From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5570 invoked by alias); 15 Jan 2015 18:02:56 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 5544 invoked by uid 89); 15 Jan 2015 18:02:53 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL,BAYES_00,SPF_HELO_PASS,SPF_PASS,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Thu, 15 Jan 2015 18:02:52 +0000 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id t0FI2lnj014348 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 15 Jan 2015 13:02:47 -0500 Received: from [10.3.113.77] (ovpn-113-77.phx2.redhat.com [10.3.113.77]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t0FI2iIT021003; Thu, 15 Jan 2015 13:02:44 -0500 Message-ID: <54B800C4.2030800@redhat.com> Date: Thu, 15 Jan 2015 18:22:00 -0000 From: Jeff Law User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.3.0 MIME-Version: 1.0 To: Jakub Jelinek , Richard Biener CC: Segher Boessenkool , Richard Biener , Eric Botcazou , gcc-patches@gcc.gnu.org Subject: Re: [PATCH] Reenable CSE of non-volatile inline asm (PR rtl-optimization/63637) References: <20150113161819.GD1405@tucnak.redhat.com> <20150113163840.GA4183@gate.crashing.org> <54B575D7.8030107@redhat.com> <20150113201322.GJ1405@tucnak.redhat.com> <54B59964.7070707@redhat.com> <20150114000315.GA32710@gate.crashing.org> <54B609A9.9090800@redhat.com> <20150114151906.GA21784@gate.crashing.org> <54B74AD9.4010905@redhat.com> <20150115081330.GB1405@tucnak.redhat.com> In-Reply-To: <20150115081330.GB1405@tucnak.redhat.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2015-01/txt/msg01238.txt.bz2 On 01/15/15 01:13, Jakub Jelinek wrote: > > The glibc barriers are supposedly something that can be CSEd (one barrier instead of > two consecutive barriers is enough), but certainly not moved across any loads/stores > in between. In the kernel case, the enable/disable probably wouldn't allow even CSE. > > So I'm with Jeff that we should treat "memory" at least as unspecified read and write, > and whether we can CSE them if there are no memory loads/stores in between them can > be discussed (most likely the kernel would be safe even in that case, because those > usually don't nest and appear in pairs, or act as barriers (like the glibc case), > or read from segment registers (guess again ok to be CSEd with no intervening loads/stores). > > In 4.9 backport I'd prefer not to CSE them at all though, stay conservative. My vote would be to go conservative. For gcc6 consider allowing a "memory" tag in the inputs and outputs to specify a read of any memory location and write of any memory location respectively. A "memory" tag in the clobbers would maintain the conservative behaviour. jeff