From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 1569 invoked by alias); 16 Jan 2015 16:35:50 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 1554 invoked by uid 89); 16 Jan 2015 16:35:49 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.5 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 16 Jan 2015 16:35:46 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by service87.mimecast.com; Fri, 16 Jan 2015 16:35:44 +0000 Received: from [10.1.203.161] ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 16 Jan 2015 16:35:44 +0000 Message-ID: <54B93E08.6030902@arm.com> Date: Fri, 16 Jan 2015 16:45:00 -0000 From: Tejas Belagod User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: Christophe Lyon , "gcc-patches@gcc.gnu.org" Subject: Re: [[ARM/AArch64][testsuite] 14/36] Add vqdmlal and vqdmlsl tests. References: <1421162314-25779-1-git-send-email-christophe.lyon@linaro.org> <1421162314-25779-15-git-send-email-christophe.lyon@linaro.org> In-Reply-To: <1421162314-25779-15-git-send-email-christophe.lyon@linaro.org> X-MC-Unique: 115011616354401001 Content-Type: text/plain; charset=WINDOWS-1252; format=flowed Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2015-01/txt/msg01413.txt.bz2 On 13/01/15 15:18, Christophe Lyon wrote: > * gcc.target/aarch64/advsimd-intrinsics/vqdmlXl.inc: New file. > * gcc.target/aarch64/advsimd-intrinsics/vqdmlal.c: New file. > * gcc.target/aarch64/advsimd-intrinsics/vqdmlsl.c: New file. > > diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlXl.= inc b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlXl.inc > new file mode 100644 > index 0000000..cd61fd4 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlXl.inc > @@ -0,0 +1,63 @@ > +#define FNNAME1(NAME) exec_ ## NAME > +#define FNNAME(NAME) FNNAME1(NAME) > + > +void FNNAME (INSN_NAME) (void) > +{ > + /* vector_res =3D OP(vector, vector3, vector4), > + then store the result. */ > +#define TEST_VQDMLXL1(INSN, T1, T2, W, W2, N, EXPECTED_CUMULATIVE_SAT, C= MT) \ > + Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N)); \ > + VECT_VAR(vector_res, T1, W, N) =3D \ > + INSN##_##T2##W2(VECT_VAR(vector, T1, W, N), \ > + VECT_VAR(vector3, T1, W2, N), \ > + VECT_VAR(vector4, T1, W2, N)); \ > + vst1q_##T2##W(VECT_VAR(result, T1, W, N), \ > + VECT_VAR(vector_res, T1, W, N)); \ > + CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CM= T) > + > +#define TEST_VQDMLXL(INSN, T1, T2, W, W2, N, EXPECTED_CUMULATIVE_SAT, CM= T) \ > + TEST_VQDMLXL1(INSN, T1, T2, W, W2, N, EXPECTED_CUMULATIVE_SAT, CMT) > + > + DECL_VARIABLE(vector, int, 32, 4); > + DECL_VARIABLE(vector3, int, 16, 4); > + DECL_VARIABLE(vector4, int, 16, 4); > + DECL_VARIABLE(vector_res, int, 32, 4); > + DECL_VARIABLE(vector, int, 64, 2); > + DECL_VARIABLE(vector3, int, 32, 2); > + DECL_VARIABLE(vector4, int, 32, 2); > + DECL_VARIABLE(vector_res, int, 64, 2); > + > + clean_results (); > + > + VLOAD(vector, buffer, q, int, s, 32, 4); > + VLOAD(vector, buffer, q, int, s, 64, 2); > + > + VDUP(vector3, , int, s, 16, 4, 0x55); > + VDUP(vector4, , int, s, 16, 4, 0xBB); > + VDUP(vector3, , int, s, 32, 2, 0x55); > + VDUP(vector4, , int, s, 32, 2, 0xBB); > + > + TEST_VQDMLXL(INSN_NAME, int, s, 32, 16, 4, expected_cumulative_sat, ""= ); > + TEST_VQDMLXL(INSN_NAME, int, s, 64, 32, 2, expected_cumulative_sat, ""= ); > + > + CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, ""); > + CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, ""); > + > + VDUP(vector3, , int, s, 16, 4, 0x8000); > + VDUP(vector4, , int, s, 16, 4, 0x8000); > + VDUP(vector3, , int, s, 32, 2, 0x80000000); > + VDUP(vector4, , int, s, 32, 2, 0x80000000); > + > +#define TEST_MSG2 "with saturation" > + TEST_VQDMLXL(INSN_NAME, int, s, 32, 16, 4, expected_cumulative_sat2, T= EST_MSG2); > + TEST_VQDMLXL(INSN_NAME, int, s, 64, 32, 2, expected_cumulative_sat2, T= EST_MSG2); > + > + CHECK(TEST_MSG, int, 32, 4, PRIx32, expected2, TEST_MSG2); > + CHECK(TEST_MSG, int, 64, 2, PRIx64, expected2, TEST_MSG2); > +} > + > +int main (void) > +{ > + FNNAME (INSN_NAME) (); > + return 0; > +} > diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlal.= c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlal.c > new file mode 100644 > index 0000000..c53a90a > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlal.c > @@ -0,0 +1,27 @@ > +#include > +#include "arm-neon-ref.h" > +#include "compute-ref-data.h" > + > +#define INSN_NAME vqdmlal > +#define TEST_MSG "VQDMLAL" > + > +/* Expected values of cumulative_saturation flag. */ > +int VECT_VAR(expected_cumulative_sat,int,32,4) =3D 0; > +int VECT_VAR(expected_cumulative_sat,int,64,2) =3D 0; > + > +/* Expected results. */ > +VECT_VAR_DECL(expected,int,32,4) [] =3D { 0x7c1e, 0x7c1f, 0x7c20, 0x7c21= }; > +VECT_VAR_DECL(expected,int,64,2) [] =3D { 0x7c1e, 0x7c1f }; > + > +/* Expected values of cumulative_saturation flag when saturation > + occurs. */ > +int VECT_VAR(expected_cumulative_sat2,int,32,4) =3D 1; > +int VECT_VAR(expected_cumulative_sat2,int,64,2) =3D 1; > + > +/* Expected results when saturation occurs. */ > +VECT_VAR_DECL(expected2,int,32,4) [] =3D { 0x7fffffef, 0x7ffffff0, > + 0x7ffffff1, 0x7ffffff2 }; > +VECT_VAR_DECL(expected2,int,64,2) [] =3D { 0x7fffffffffffffef, > + 0x7ffffffffffffff0 }; > + > +#include "vqdmlXl.inc" > diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlsl.= c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlsl.c > new file mode 100644 > index 0000000..56e0b61 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlsl.c > @@ -0,0 +1,29 @@ > +#include > +#include "arm-neon-ref.h" > +#include "compute-ref-data.h" > + > +#define INSN_NAME vqdmlsl > +#define TEST_MSG "VQDMLSL" > + > +/* Expected values of cumulative_saturation flag. */ > +int VECT_VAR(expected_cumulative_sat,int,32,4) =3D 0; > +int VECT_VAR(expected_cumulative_sat,int,64,2) =3D 0; > + > +/* Expected results. */ > +VECT_VAR_DECL(expected,int,32,4) [] =3D { 0xffff83c2, 0xffff83c3, > + 0xffff83c4, 0xffff83c5 }; > +VECT_VAR_DECL(expected,int,64,2) [] =3D { 0xffffffffffff83c2, > + 0xffffffffffff83c3 }; > + > +/* Expected values of cumulative_saturation flag when saturation > + occurs. */ > +int VECT_VAR(expected_cumulative_sat2,int,32,4) =3D 1; > +int VECT_VAR(expected_cumulative_sat2,int,64,2) =3D 1; > + > +/* Expected results when saturation occurs. */ > +VECT_VAR_DECL(expected2,int,32,4) [] =3D { 0x80000000, 0x80000000, > + 0x80000000, 0x80000000 }; > +VECT_VAR_DECL(expected2,int,64,2) [] =3D { 0x8000000000000000, > + 0x8000000000000000 }; > + > +#include "vqdmlXl.inc" > LGTM. Tejas.