So here's the updated patch which handles all 4 testcases from the PR as 
well as a couple of my own.

As discussed earlier this week, we have to twiddle the heuristic for 
when to enable 4 insn combinations to make 4-insn combos where the first 
insn is a load and the last a store profitable.  And we still need to 
handle the MEMs being different modes.

The new part of the patch is extending make_field_assignment to handle 
cases where SUBREGs appear in the source of the potential field assignment.

In particular make_field_assignment has some nice code to detect a field 
assignment that looks like

(set (x) (ior (and (x) (const_int C)) y)))

There's obviously a variety of tests, but that's the overall structure 
of the RTL.

To handle the cases in PR 15184, we just need to be able to handle a 
couple annoying SUBREGs:

(set (x)
  (subreg (ior (and (subreg (x)) (const_int C) y)

The outer subreg is going to be a narrowing subreg to narrow the 
logicals to whatever mode the destination uses.  The inner subreg widens 
the source to whatever mode is needed for the logicals.

Once the subregs are handled, the everything "just works" as I outlined 
in my earlier message.

Bootstrapped & regression tested on x86_64-unknown-linux and 
powerpc64-unknown-linux.

Applying to the trunk.

Jeff