From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-patches-return-391601-listarch-gcc-patches=gcc.gnu.org@gcc.gnu.org>
Received: (qmail 13206 invoked by alias); 10 Feb 2015 09:25:30 -0000
Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm
Precedence: bulk
List-Id: <gcc-patches.gcc.gnu.org>
List-Archive: <http://gcc.gnu.org/ml/gcc-patches/>
List-Post: <mailto:gcc-patches@gcc.gnu.org>
List-Help: <mailto:gcc-patches-help@gcc.gnu.org>
Sender: gcc-patches-owner@gcc.gnu.org
Received: (qmail 12773 invoked by uid 89); 10 Feb 2015 09:25:30 -0000
Authentication-Results: sourceware.org; auth=none
X-Virus-Found: No
X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2
X-HELO: service87.mimecast.com
Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 10 Feb 2015 09:25:29 +0000
Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by service87.mimecast.com; Tue, 10 Feb 2015 09:25:26 +0000
Received: from [10.2.207.50] ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959);	 Tue, 10 Feb 2015 09:25:24 +0000
Message-ID: <54D9CE83.5020006@arm.com>
Date: Tue, 10 Feb 2015 09:25:00 -0000
From: Kyrill Tkachov <kyrylo.tkachov@arm.com>
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0
MIME-Version: 1.0
To: GCC Patches <gcc-patches@gcc.gnu.org>
CC: Ramana Radhakrishnan <Ramana.Radhakrishnan@arm.com>,  Richard Earnshaw <Richard.Earnshaw@arm.com>
Subject: Re: [PATCH][ARM] PR target/64600 Fix another ICE with -mtune=xscale: properly sign-extend mask during constant splitting
References: <54D0E6BF.8070804@arm.com>
In-Reply-To: <54D0E6BF.8070804@arm.com>
X-MC-Unique: 115021009252601001
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: quoted-printable
X-IsSubscribed: yes
X-SW-Source: 2015-02/txt/msg00604.txt.bz2

Ping.

https://gcc.gnu.org/ml/gcc-patches/2015-02/msg00141.html

Thanks,
Kyrill

On 03/02/15 15:18, Kyrill Tkachov wrote:
> Hi all,
>
> The ICE in this PR occurs when -mtune=3Dxscale triggers a particular path
> through arm_gen_constant during expand
> that creates a 0xfffff00f mask but for a 64-bit HOST_WIDE_INT doesn't
> sign extend it into
> 0xfffffffffffff00f that signifies the required -4081. It leaves it as
> 0xfffff00f (4294963215) that breaks when
> later combine tries to perform an SImode bitwise AND using the wide-int
> machinery.
>
> I think the correct approach here is to use trunc_int_for_mode that
> correctly sign-extends the constant so
> that it is properly represented by a HOST_WIDE_INT for the required mode.
>
> Bootstrapped and tested arm-none-linux-gnueabihf with -mtune=3Dxscale in
> BOOT_CFLAGS.
>
> The testcase triggers for -mcpu=3Dxscale and all slowmul targets because
> they are the only ones that have the
> constant_limit tune parameter set to anything >1 which is required to
> follow this particular path through
> arm_split_constant. Also, the rtx costs can hide this ICE sometimes.
>
> Ok for trunk?
>
> Thanks,
> Kyrill
>
> 2015-02-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
>
>       PR target/64600
>       * config/arm/arm.c (arm_gen_constant, AND case): Call
>       trunc_int_for_mode when constructing AND mask.
>
> 2015-02-03  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
>
>       PR target/64600
>       * gcc.target/arm/pr64600_1.c: New test.