From: Michael Eager <eager@eagerm.com>
To: Ajit Kumar Agarwal <ajit.kumar.agarwal@xilinx.com>,
GCC Patches <gcc-patches@gcc.gnu.org>
Cc: Vinod Kathail <vinodk@xilinx.com>,
Shail Aditya Gupta <shailadi@xilinx.com>,
Vidhumouli Hunsigida <vidhum@xilinx.com>,
Nagaraju Mekala <nmekala@xilinx.com>
Subject: Re: [Patch,microblaze]: Optimized usage of pcmp conditional instruction.
Date: Wed, 25 Feb 2015 23:31:00 -0000 [thread overview]
Message-ID: <54EE53BD.9060702@eagerm.com> (raw)
In-Reply-To: <4efa2fbc04a649b483100a8235c6e263@BN1BFFO11FD004.protection.gbl>
On 02/25/15 02:19, Ajit Kumar Agarwal wrote:
> Hello All:
>
> Please find the patch for the optimized usage of pcmp instructions in microblaze. No regressions is seen
> In deja GNU tests. There are many testcases that are already there in deja GNU to check the generation of
> pcmpne/pcmpeq instructions and are used to check the validity.
>
> commit b74acf44ce4286649e5be7cff7518d814cb2491f
> Author: Ajit Kumar Agarwal <ajitkum@xhdspdgnu.(none)>
> Date: Wed Feb 25 15:33:02 2015 +0530
>
> [Patch,microblaze]: Optimized usage of pcmp conditional instruction.
>
> The changes are made in the patch for optimized usage of pcmpne/pcmpeq
> instructions. The xor with register to register is replaced with pcmpeq
> /pcmpne instructions and for immediate check still the xori will be used.
> The purpose of the change is to acheive the aggressive usage of pcmpne
> /pcmpeq instructions instead of xor being used for comparison.
>
> ChangeLog:
> 2015-02-25 Ajit Agarwal <ajitkum@xilinx.com>
>
> * config/microblaze/microblaze.md (cbranchsi4): Added immediate
> constraints.
> (cbranchsi4_reg): New.
> * config/microblaze/microblaze.c
> (microblaze_expand_conditional_branch_reg): New.
> * config/microblaze/microblaze-protos.h
> (microblaze_expand_conditional_branch_reg): New prototype.
+ if (cmp_op1 == const0_rtx)
+ {
+ comp_reg = cmp_op0;
+ condition = gen_rtx_fmt_ee (signed_condition (code),
+ SImode, comp_reg, const0_rtx);
+ emit_jump_insn (gen_condjump (condition, label1));
+ }
+
+ else if (code == EQ || code == NE)
+ {
+ if (code == NE)
+ {
+ emit_insn (gen_sne_internal_pat (comp_reg, cmp_op0,
+ cmp_op1));
+ condition = gen_rtx_NE (SImode, comp_reg, const0_rtx);
+ }
+ else
+ {
+ emit_insn (gen_seq_internal_pat (comp_reg,
+ cmp_op0, cmp_op1));
+ condition = gen_rtx_EQ (SImode, comp_reg, const0_rtx);
+ }
+ emit_jump_insn (gen_condjump (condition, label1));
+ }
+ else
+ {
...
No blank line between end brace of if and else.
Replace with
+ else if (code == EQ)
+ {
+ emit_insn (gen_seq_internal_pat (comp_reg, cmp_op0, cmp_op1));
+ condition = gen_rtx_EQ (SImode, comp_reg, const0_rtx);
+ emit_jump_insn (gen_condjump (condition, label1));
+ }
+ else if (code == NE)
+ {
+ emit_insn (gen_sne_internal_pat (comp_reg, cmp_op0, cmp_op1));
+ condition = gen_rtx_NE (SImode, comp_reg, const0_rtx);
+ emit_jump_insn (gen_condjump (condition, label1));
+ }
+ else
+ {
...
--
Michael Eager eager@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
next prev parent reply other threads:[~2015-02-25 22:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-25 10:26 Ajit Kumar Agarwal
2015-02-25 23:31 ` Michael Eager [this message]
2015-03-06 5:12 ` Ajit Kumar Agarwal
2015-03-06 15:33 ` Michael Eager
2015-05-05 1:09 ` Michael Eager
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