Index: doc/invoke.texi =================================================================== --- doc/invoke.texi (revision 221324) +++ doc/invoke.texi (working copy) @@ -571,8 +571,8 @@ -remap -trigraphs -undef -U@var{macro} @emph{AVR Options} @gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol --mcall-prologues -mint8 -mno-interrupts -mrelax @gol --mstrict-X -mtiny-stack -Waddr-space-convert} +-mcall-prologues -mint8 -mn_flash=@var{size} -mno-interrupts @gol +-mrelax -mrmw -mstrict-X -mtiny-stack -Waddr-space-convert} @emph{Blackfin Options} @gccoptlist{-mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]} @gol @@ -13509,6 +13509,11 @@ and @code{long long} is 4 bytes. Please conform to the C standards, but it results in smaller code size. +@item -mn-flash=@var{num} +@opindex mn-flash +Assume that the flash memory has a size of +@var{num} times 64@tie{}KiB. + @item -mno-interrupts @opindex mno-interrupts Generated code is not compatible with hardware interrupts. @@ -13518,8 +13523,9 @@ Code size is smaller. @opindex mrelax Try to replace @code{CALL} resp.@: @code{JMP} instruction by the shorter @code{RCALL} resp.@: @code{RJMP} instruction if applicable. -Setting @option{-mrelax} just adds the @option{--relax} option to the -linker command line when the linker is called. +Setting @option{-mrelax} just adds the @option{--mlink-relax} option to +the assembler's command line and the @option{--relax} option to the +linker's command line. Jump relaxing is performed by the linker because jump offsets are not known before code is located. Therefore, the assembler code generated by the @@ -13529,6 +13535,11 @@ differ from instructions in the assemble Relaxing must be turned on if linker stubs are needed, see the section on @code{EIND} and linker stubs below. +@item -mrmw +@opindex mrmw +Assume that the device supports the Read-Modify-Write +instructions @code{XCH}, @code{LAC}, @code{LAS} and @code{LAT}. + @item -msp8 @opindex msp8 Treat the stack pointer register as an 8-bit register, @@ -13769,17 +13780,27 @@ architecture and depends on the @option{ Possible values are: @code{2}, @code{25}, @code{3}, @code{31}, @code{35}, -@code{4}, @code{5}, @code{51}, @code{6}, @code{102}, @code{104}, +@code{4}, @code{5}, @code{51}, @code{6} + +for @var{mcu}=@code{avr2}, @code{avr25}, @code{avr3}, @code{avr31}, +@code{avr35}, @code{avr4}, @code{avr5}, @code{avr51}, @code{avr6}, + +respectively and + +@code{100}, @code{102}, @code{104}, @code{105}, @code{106}, @code{107} -for @var{mcu}=@code{avr2}, @code{avr25}, @code{avr3}, -@code{avr31}, @code{avr35}, @code{avr4}, @code{avr5}, @code{avr51}, -@code{avr6}, @code{avrxmega2}, @code{avrxmega4}, @code{avrxmega5}, -@code{avrxmega6}, @code{avrxmega7}, respectively. +for @var{mcu}=@code{avrtiny}, @code{avrxmega2}, @code{avrxmega4}, +@code{avrxmega5}, @code{avrxmega6}, @code{avrxmega7}, respectively. If @var{mcu} specifies a device, this built-in macro is set accordingly. For example, with @option{-mmcu=atmega8} the macro is defined to @code{4}. +@item __AVR_DEVICE_NAME__ +If @var{mcu} in @option{-mmcu=@var{mcu}} specifies a device, this macro +is defined to @var{mcu}. If @var{mcu} is a core architecture like +@code{avr51} this macro is not defined. + @item __AVR_@var{Device}__ Setting @option{-mmcu=@var{device}} defines this built-in macro which reflects the device's name. For example, @option{-mmcu=atmega8} defines the @@ -13795,7 +13816,7 @@ @var{Device} in the built-in macro and @ If @var{device} is not a device but only a core architecture like @samp{avr51}, this macro is not defined. -@item __AVR_DEVICE_NAME__ +@item __AVR_DEVICE_NAME__ Setting @option{-mmcu=@var{device}} defines this built-in macro to the device's name. For example, with @option{-mmcu=atmega8} the macro is defined to @code{atmega8}. Index: testsuite/gcc.target/avr/tiny-caller-save.c =================================================================== --- testsuite/gcc.target/avr/tiny-caller-save.c (revision 221324) +++ testsuite/gcc.target/avr/tiny-caller-save.c (working copy) @@ -1,8 +1,8 @@ /* { dg-do compile } */ -/* { dg-options "-march=avrtiny -gdwarf -Os" } */ +/* { dg-options "-mmcu=avrtiny -gdwarf -Os" } */ /* This is a stripped down piece of libgcc2.c that triggerd an ICE for avr with - "-march=avrtiny -g -Os"; replace_reg_with_saved_mem would generate: + "-mmcu=avrtiny -g -Os"; replace_reg_with_saved_mem would generate: (concatn:SI [ (reg:SI 18 r18) (reg:SI 19 r19) Index: testsuite/gcc.target/avr/tiny-memx.c =================================================================== --- testsuite/gcc.target/avr/tiny-memx.c (revision 221324) +++ testsuite/gcc.target/avr/tiny-memx.c (working copy) @@ -1,4 +1,4 @@ /* { dg-do compile } */ -/* { dg-options "-march=avrtiny" } */ +/* { dg-options "-mmcu=avrtiny" } */ const __memx char ascmonth[] = "Jan"; /* { dg-error "not supported" } */