From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id ADE20385E006; Thu, 26 Mar 2020 15:18:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org ADE20385E006 Received: from pps.filterd (m0127361.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 02QF40Ls152402; Thu, 26 Mar 2020 11:18:13 -0400 Received: from ppma02dal.us.ibm.com (a.bd.3ea9.ip4.static.sl-reverse.com [169.62.189.10]) by mx0a-001b2d01.pphosted.com with ESMTP id 2ywdr8p6vs-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 26 Mar 2020 11:18:12 -0400 Received: from pps.filterd (ppma02dal.us.ibm.com [127.0.0.1]) by ppma02dal.us.ibm.com (8.16.0.27/8.16.0.27) with SMTP id 02QFFeHg003385; Thu, 26 Mar 2020 15:18:11 GMT Received: from b01cxnp22034.gho.pok.ibm.com (b01cxnp22034.gho.pok.ibm.com [9.57.198.24]) by ppma02dal.us.ibm.com with ESMTP id 2ywaw2n8ke-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 26 Mar 2020 15:18:11 +0000 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 02QFIBO153215710 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 26 Mar 2020 15:18:11 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E776EB2064; Thu, 26 Mar 2020 15:18:10 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4E4D6B2065; Thu, 26 Mar 2020 15:18:10 +0000 (GMT) Received: from lexx (unknown [9.160.6.102]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Thu, 26 Mar 2020 15:18:10 +0000 (GMT) Message-ID: <5508f26ca18114ee84c5bd37ce7aec045fd77c18.camel@vnet.ibm.com> Subject: Re: [PATCH] rs6000: Don't split constant oprator when add, move to temp register for future optimization From: will schmidt To: luoxhu@linux.ibm.com, gcc-patches@gcc.gnu.org Cc: wschmidt@linux.ibm.com, linkw@gcc.gnu.org, segher@kernel.crashing.org Date: Thu, 26 Mar 2020 10:18:09 -0500 In-Reply-To: <20200326100643.32487-1-luoxhu@linux.ibm.com> References: <20200326100643.32487-1-luoxhu@linux.ibm.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5 (3.28.5-5.el7) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.645 definitions=2020-03-26_05:2020-03-26, 2020-03-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 adultscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 priorityscore=1501 clxscore=1015 suspectscore=0 mlxlogscore=999 mlxscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2003260113 X-Spam-Status: No, score=-26.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_DMARC_STATUS, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 Mar 2020 15:18:14 -0000 On Thu, 2020-03-26 at 05:06 -0500, luoxhu--- via Gcc-patches wrote: > From: Xionghu Luo > > Remove split code from add3 to allow a later pass to split. > This allows later logic to hoist out constant load in add > instructions. > In loop, lis+ori could be hoisted out to improve performance compared > with > previous addis+addi (About 15% on typical case), weak point is > one more register is used and one more instruction is > generated. i.e.: > > addis 3,3,0x8765 > addi 3,3,0x4321 > > => > > lis 9,0x8765 > ori 9,9,0x4321 > add 3,3,9 LGTM. :-) I defer to Segher for his review & approval, etc. Thanks, -Will > > gcc/ChangeLog: > > 2020-03-26 Xiong Hu Luo > > * config/rs6000/rs6000.md (add3): Remove split code, move constant > to temp register before add. > > gcc/testsuite/ChangeLog: > > 2020-03-26 Xiong Hu Luo > > * gcc.target/powerpc/add-const.c: New. > --- > gcc/config/rs6000/rs6000.md | 25 ++-------------- > ---- > gcc/testsuite/gcc.target/powerpc/add-const.c | 18 ++++++++++++++ > 2 files changed, 20 insertions(+), 23 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/powerpc/add-const.c > > diff --git a/gcc/config/rs6000/rs6000.md > b/gcc/config/rs6000/rs6000.md > index ad88b6783af..72f3f604e0d 100644 > --- a/gcc/config/rs6000/rs6000.md > +++ b/gcc/config/rs6000/rs6000.md > @@ -1733,29 +1733,8 @@ (define_expand "add3" > || rtx_equal_p (operands[0], operands[1])) > ? operands[0] : gen_reg_rtx (mode)); > > - /* Adding a constant to r0 is not a valid insn, so use a > different > - strategy in that case. */ > - if (reg_or_subregno (operands[1]) == 0 || reg_or_subregno > (tmp) == 0) > - { > - if (operands[0] == operands[1]) > - FAIL; > - rs6000_emit_move (operands[0], operands[2], mode); > - emit_insn (gen_add3 (operands[0], operands[1], > operands[0])); > - DONE; > - } > - > - HOST_WIDE_INT val = INTVAL (operands[2]); > - HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000; > - HOST_WIDE_INT rest = trunc_int_for_mode (val - low, > mode); > - > - if (mode == DImode && !satisfies_constraint_L (GEN_INT > (rest))) > - FAIL; > - > - /* The ordering here is important for the prolog expander. > - When space is allocated from the stack, adding 'low' first may > - produce a temporary deallocation (which would be bad). */ > - emit_insn (gen_add3 (tmp, operands[1], GEN_INT (rest))); > - emit_insn (gen_add3 (operands[0], tmp, GEN_INT (low))); > + rs6000_emit_move (tmp, operands[2], mode); > + emit_insn (gen_add3 (operands[0], operands[1], tmp)); > DONE; > } > }) > diff --git a/gcc/testsuite/gcc.target/powerpc/add-const.c > b/gcc/testsuite/gcc.target/powerpc/add-const.c > new file mode 100644 > index 00000000000..e1007247b32 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/add-const.c > @@ -0,0 +1,18 @@ > +/* { dg-do compile { target { lp64 } } } */ > +/* { dg-options "-O3 -fno-unroll-loops" } */ > + > +/* Ensure the lis,ori are generated, which indicates they have > + been hoisted outside of the loop. */ > + > +typedef unsigned long ulong; > +ulong > +foo (ulong n, ulong h) > +{ > + int i; > + for (i = 0; i < n; i++) > + h = ((h + 8) | h) + 0x87654321; > + return h; > +} > + > +/* { dg-final { scan-assembler-times {\mlis\M} 1 } } */ > +/* { dg-final { scan-assembler-times {\mori\M} 1 } } */