From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 22248 invoked by alias); 22 Apr 2015 16:59:11 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 22196 invoked by uid 89); 22 Apr 2015 16:59:11 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (146.101.78.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 22 Apr 2015 16:59:10 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by uk-mta-1.uk.mimecast.lan; Wed, 22 Apr 2015 17:59:06 +0100 Received: from [10.2.207.65] ([10.1.2.79]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 22 Apr 2015 17:59:06 +0100 Message-ID: <5537D35A.1020709@arm.com> Date: Wed, 22 Apr 2015 16:59:00 -0000 From: Alan Lawrence User-Agent: Thunderbird 2.0.0.24 (X11/20101213) MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" Subject: [PATCH 2/14][ARM]Add float16x8_t type In-Reply-To: <5537D241.1000606@arm.com> X-MC-Unique: x-H_TlUrQIatZ4omsc6lqg-1 Content-Type: multipart/mixed; boundary="------------030509090109020100090205" X-IsSubscribed: yes X-SW-Source: 2015-04/txt/msg01336.txt.bz2 This is a multi-part message in MIME format. --------------030509090109020100090205 Content-Type: text/plain; charset=WINDOWS-1252; format=flowed Content-Transfer-Encoding: quoted-printable Content-length: 115 Identical to https://gcc.gnu.org/ml/gcc-patches/2015-01/msg01438.html . Bootstrapped on arm-none-linux-gnueabihf. --------------030509090109020100090205 Content-Type: text/x-patch; name=02_arm_float16x8_t.patch Content-Transfer-Encoding: quoted-printable Content-Disposition: inline; filename="02_arm_float16x8_t.patch" Content-length: 3266 commit bc582bd6a0ed7c7c91fc834603fc573ed745b1a7 Author: Alan Lawrence Date: Mon Dec 8 18:40:24 2014 +0000 Add float16x8_t + V8HFmode support (regardless of -mfp16-format) diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c index 3de2be7..2d97023 100644 --- a/gcc/config/arm/arm-builtins.c +++ b/gcc/config/arm/arm-builtins.c @@ -204,6 +204,7 @@ arm_storestruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS] #define di_UP DImode #define v16qi_UP V16QImode #define v8hi_UP V8HImode +#define v8hf_UP V8HFmode #define v4si_UP V4SImode #define v4sf_UP V4SFmode #define v2di_UP V2DImode @@ -839,6 +840,7 @@ arm_init_simd_builtin_types (void) /* Continue with standard types. */ arm_simd_types[Float16x4_t].eltype =3D arm_simd_floatHF_type_node; arm_simd_types[Float32x2_t].eltype =3D float_type_node; + arm_simd_types[Float16x8_t].eltype =3D arm_simd_floatHF_type_node; arm_simd_types[Float32x4_t].eltype =3D float_type_node; =20 for (i =3D 0; i < nelts; i++) diff --git a/gcc/config/arm/arm-simd-builtin-types.def b/gcc/config/arm/arm= -simd-builtin-types.def index bcbd20b..b178ae6 100644 --- a/gcc/config/arm/arm-simd-builtin-types.def +++ b/gcc/config/arm/arm-simd-builtin-types.def @@ -44,5 +44,7 @@ =20 ENTRY (Float16x4_t, V4HF, none, 64, float16, 18) ENTRY (Float32x2_t, V2SF, none, 64, float32, 18) + + ENTRY (Float16x8_t, V8HF, none, 128, float16, 19) ENTRY (Float32x4_t, V4SF, none, 128, float32, 19) =20 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 4181f12..9de63fa 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -26367,7 +26367,8 @@ arm_vector_mode_supported_p (machine_mode mode) { /* Neon also supports V2SImode, etc. listed in the clause below. */ if (TARGET_NEON && (mode =3D=3D V2SFmode || mode =3D=3D V4SImode || mode= =3D=3D V8HImode - || mode =3D=3D V4HFmode || mode =3D=3D V16QImode || mode =3D=3D V4SF= mode || mode =3D=3D V2DImode)) + || mode =3D=3DV4HFmode || mode =3D=3D V16QImode || mode =3D=3D V4SFm= ode + || mode =3D=3D V2DImode || mode =3D=3D V8HFmode)) return true; =20 if ((TARGET_NEON || TARGET_IWMMXT) diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 8c10ea3..f0ef33f 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1104,7 +1104,7 @@ extern int arm_arch_crc; /* Modes valid for Neon Q registers. */ #define VALID_NEON_QREG_MODE(MODE) \ ((MODE) =3D=3D V4SImode || (MODE) =3D=3D V8HImode || (MODE) =3D=3D V16QI= mode \ - || (MODE) =3D=3D V4SFmode || (MODE) =3D=3D V2DImode) + || (MODE) =3D=3D V8HFmode || (MODE) =3D=3D V4SFmode || (MODE) =3D=3D V2= DImode) =20 /* Structure modes valid for Neon registers. */ #define VALID_NEON_STRUCT_MODE(MODE) \ diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h index b4100c8..a958f63 100644 --- a/gcc/config/arm/arm_neon.h +++ b/gcc/config/arm/arm_neon.h @@ -58,6 +58,7 @@ typedef __simd128_int8_t int8x16_t; typedef __simd128_int16_t int16x8_t; typedef __simd128_int32_t int32x4_t; typedef __simd128_int64_t int64x2_t; +typedef __simd128_float16_t float16x8_t; typedef __simd128_float32_t float32x4_t; typedef __simd128_poly8_t poly8x16_t; typedef __simd128_poly16_t poly16x8_t; --------------030509090109020100090205--