This adds basic support for moving __fp16 values around, passing and returning, 
and operating on them by promoting to 32-bit floats. Also a few scalar testcases.

Note I've not got an fmov (immediate) variant, because there is no 'fmov h<n>, 
...' - the only way to load a 16-bit immediate is to reinterpret the bit pattern 
into some other type. Vector MOVs are turned off for the same reason. If this is 
practical it can follow in a separate patch.

My reading of ACLE suggests the type name to use is __fp16, rather than 
__builtin_aarch64_simd_hf. I can use the latter if that's preferable?

int<->f16 conversions are a little odd, assembly

int_to_f16: scvtf d0, w0 fcvt h0, d0 ret

int_from_f16: fcvt s0, h0 fcvtzs w0, s0 ret

The spec is silent on the absence or existence of intermediate rounding steps, 
however, I don't think this matters: even float32_t offers soooo many more bits 
than __fp16, that any integer which fits into the range of an __fp16 (i.e. is 
not infinite), can be expressed exactly as a float32_t without any loss of 
precision. So I think the above are OK. (if they can be optimized, that can 
follow in a later patch.)

Note that unlike ARM, where we support both IEEE and Alternative formats (and, 
somewhat-awkwardly, format-agnostic code too), here we are settling on IEEE 
format always. Technically, we should output an EABI attribute saying which 
format we are using here, however, aarch64 asm does not support the 
.eabi-attribute directive yet, so it seems reasonable to leave this while there 
is only one possible format.

Bootstrapped + check-gcc on aarch64-none-linux-gnu.

gcc/ChangeLog:

	* config/aarch64/aarch64-builtins.c (aarch64_fp16_type_node): New.
	(aarch64_init_builtins): Make aarch64_fp16_type_node, use for __fp16.

	* config/aarch64/aarch64-modes.def: Add HFmode.

	* config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
	__ARM_FP16_FORMAT_IEEE and __ARM_FP16_ARGS. Set bit 1 of __ARM_FP.

	* config/aarch64/aarch64.c (aarch64_init_libfuncs,
	aarch64_promoted_type): New.

	(aarch64_float_const_representable_p): Disable HFmode.
	(aarch64_mangle_type): Mangle half-precision floats to "Dh".
	(TARGET_PROMOTED_TYPE): Define to aarch64_promoted_type.
	(TARGET_INIT_LIBFUNCS): Define to aarch64_init_libfuncs.

	* config/aarch64/aarch64.md (mov<mode>): Include HFmode using GPF_F16.
	(movhf_aarch64, extendhfsf2, extendhfdf2, truncsfhf2, truncdfhf2): New.

	* config/aarch64/iterators.md (GPF_F16): New.


gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/f16_convs_1.c: New test.
	* gcc.target/aarch64/f16_convs_2.c: New test.
	* gcc.target/aarch64/f16_movs_1.c: New test.