This is a fairly straightforward addition of a new type: I've added it in on 
equal status to the other types, because the various 
vector-load/store/element-manipulating intrinsics, are *not* conditional on HW 
support. (They just involve moving 16-bit chunks around, just like s16/u16/p16).

Thus, for many tests, this just involves adding default "expected" values of { 
0x3333 ...}. While there are indeed more of such "default" values for 
float16x4/8 than any other type (because there are fewer intrinsics), there are 
plenty others, so this seems consistent. However, there is no vdup_n_f16 
intrinsic so I worked around this using a macro (yes, a bit ugh).

There are many check_GNU_style.sh violations here but I tried to be consistent 
with the existing code.

Passing on arm-none-linux-gnueabihf and aarch64-none-linux-gnu, 
aarch64_be-none-elf (following previous patch)

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (hfloat16_t,
	vdup_n_f16): New.
	(result, expected, CHECK_RESULTS, CHECK_RESULTS_NAMED, clean_results):
	Add float16x4 and float16x8 cases.

	DECL_VARIABLE_64BITS_VARIANTS: Add float16x4 case.
	DECL_VARIABLE_128BITS_VARIANTS: Add float16x8 case.

	* gcc.target/aarch64/advsimd-intrinsics/compute-data-ref.h (buffer,
	buffer_pad, buffer_dup, buffer_dup_pad): Add float16x4 and float16x8.

	* gcc.target/aarch64/advsimd-intrinsics/vaba.c: Add expected results
	for float16x4 and float16x8.
	* gcc.target/aarch64/advsimd-intrinsics/vabal.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vabd.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vabdl.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vabs.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vadd.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vaddl.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vaddw.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vand.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vbic.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vbsl.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcls.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vclz.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vcnt.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vdup-vmov.c: Likewise.

	* gcc.target/aarch64/advsimd-intrinsics/vcombine.c: Add expected
	results for float16x4 and float16x8.
	(main): add test of float16x4 -> float16x8 case.
	* gcc.target/aarch64/advsimd-intrinsics/vcreate.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c: Likewise.