[PATCH][AARCH64]Add ACLE 2.0 predefined macros: __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR

[PATCH][AARCH64]Add ACLE 2.0 predefined macros: __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR

[Renlin Li]

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Hi all,

This is a simple patch to add another two ACLE 2.0 predefined macros 
into aarch64 backend.
They are __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR. Currently, 
those two values are hard-wired to 16.

The following clauses from ACLE 2.0 documentation indicate the meaning 
of those two macros:

The macro __ARM_ALIGN_MAX_STACK_PWR indicates (as the exponent of a 
power of 2) the maximum available stack alignment.
The macro __ARM_ALIGN_MAX_PWR indicates (as the exponent of a power of 
2) the maximum available alignment of static data.

aarch64-none-elf target is tested on on the model. No new regression.

Is it Okay for trunk?

Regards,
Renlin Li

gcc/ChangeLog

2014-12-16  Renlin Li  <renlin.li@arm.com>

         * config/aarch64/aarch64.h(TARGET_CPU_CPP_BUILTINS): Define 
__ARM_ALIGN_MAX_PWR
         and __ARM_ALIGN_MAX_STACK_PWR.

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diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 8ed1f84..78417d7 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -29,6 +29,10 @@
       builtin_define ("__aarch64__");                   \
       builtin_define ("__ARM_64BIT_STATE");             \
       builtin_define_with_int_value                     \
+        ("__ARM_ALIGN_MAX_PWR", 16);			\
+      builtin_define_with_int_value                     \
+        ("__ARM_ALIGN_MAX_STACK_PWR", 16);		\
+      builtin_define_with_int_value                     \
         ("__ARM_ARCH", aarch64_architecture_version);   \
       cpp_define_formatted                                              \
         (parse_in, "__ARM_ARCH_%dA", aarch64_architecture_version);     \

[PING][PATCH][AARCH64]Add ACLE 2.0 predefined macros: __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR

[Renlin Li]

Ping~

Regards,
Renlin Li

On 16/12/14 10:19, Renlin Li wrote:
> Hi all,
>
> This is a simple patch to add another two ACLE 2.0 predefined macros
> into aarch64 backend.
> They are __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR. Currently,
> those two values are hard-wired to 16.
>
> The following clauses from ACLE 2.0 documentation indicate the meaning
> of those two macros:
>
> The macro __ARM_ALIGN_MAX_STACK_PWR indicates (as the exponent of a
> power of 2) the maximum available stack alignment.
> The macro __ARM_ALIGN_MAX_PWR indicates (as the exponent of a power of
> 2) the maximum available alignment of static data.
>
> aarch64-none-elf target is tested on on the model. No new regression.
>
> Is it Okay for trunk?
>
> Regards,
> Renlin Li
>
> gcc/ChangeLog
>
> 2014-12-16  Renlin Li  <renlin.li@arm.com>
>
>           * config/aarch64/aarch64.h(TARGET_CPU_CPP_BUILTINS): Define
> __ARM_ALIGN_MAX_PWR
>           and __ARM_ALIGN_MAX_STACK_PWR.

Re: [PATCH][AARCH64]Add ACLE 2.0 predefined macros: __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR

[Marcus Shawcroft]

On 16 December 2014 at 10:19, Renlin Li <renlin.li@arm.com> wrote:

> 2014-12-16  Renlin Li  <renlin.li@arm.com>
>
>         * config/aarch64/aarch64.h(TARGET_CPU_CPP_BUILTINS): Define
> __ARM_ALIGN_MAX_PWR
>         and __ARM_ALIGN_MAX_STACK_PWR.

OK /Marcus

Re: [PATCH][AARCH64]Add ACLE 2.0 predefined macros: __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR

[Andrew Pinski]

On Tue, Dec 16, 2014 at 2:19 AM, Renlin Li <renlin.li@arm.com> wrote:
> Hi all,
>
> This is a simple patch to add another two ACLE 2.0 predefined macros into
> aarch64 backend.
> They are __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR. Currently, those
> two values are hard-wired to 16.
>
> The following clauses from ACLE 2.0 documentation indicate the meaning of
> those two macros:
>
> The macro __ARM_ALIGN_MAX_STACK_PWR indicates (as the exponent of a power of
> 2) the maximum available stack alignment.
> The macro __ARM_ALIGN_MAX_PWR indicates (as the exponent of a power of 2)
> the maximum available alignment of static data.
>
> aarch64-none-elf target is tested on on the model. No new regression.
>
> Is it Okay for trunk?

Have you tested these alignments?  That is have we tested 65536
alignment for both stack and static data?
I suspect the stack alignment that is support is not 64k but much
smaller.  And the supported static data alignment is much larger,
maybe 20 or more.

Thanks,
Andrew Pinski


>
> Regards,
> Renlin Li
>
> gcc/ChangeLog
>
> 2014-12-16  Renlin Li  <renlin.li@arm.com>
>
>         * config/aarch64/aarch64.h(TARGET_CPU_CPP_BUILTINS): Define
> __ARM_ALIGN_MAX_PWR
>         and __ARM_ALIGN_MAX_STACK_PWR.

Re: [PATCH][AARCH64]Add ACLE 2.0 predefined macros: __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR

[Marcus Shawcroft]

On 29 April 2015 at 01:24, Andrew Pinski <pinskia@gmail.com> wrote:
> On Tue, Dec 16, 2014 at 2:19 AM, Renlin Li <renlin.li@arm.com> wrote:
>> Hi all,
>>
>> This is a simple patch to add another two ACLE 2.0 predefined macros into
>> aarch64 backend.
>> They are __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR. Currently, those
>> two values are hard-wired to 16.
>>
>> The following clauses from ACLE 2.0 documentation indicate the meaning of
>> those two macros:
>>
>> The macro __ARM_ALIGN_MAX_STACK_PWR indicates (as the exponent of a power of
>> 2) the maximum available stack alignment.
>> The macro __ARM_ALIGN_MAX_PWR indicates (as the exponent of a power of 2)
>> the maximum available alignment of static data.
>>
>> aarch64-none-elf target is tested on on the model. No new regression.
>>
>> Is it Okay for trunk?
>
> Have you tested these alignments?  That is have we tested 65536
> alignment for both stack and static data?
> I suspect the stack alignment that is support is not 64k but much
> smaller.  And the supported static data alignment is much larger,
> maybe 20 or more.

Looks to me  __ARM_ALIGN_MAX_STACK_PWR can be lifted to 2^16 without
issue.  GCC won't gripe about the static data alignment until 2^29.
Aside from the latter being rather conservative I think we should add
a test case to the testsuite for each. RenLin can you prep a testcase?

/Marcus

Re: Re: [PATCH][AARCH64]Add ACLE 2.0 predefined macros: __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR

[Renlin Li]

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On 29/04/15 11:58, Marcus Shawcroft wrote:
> On 29 April 2015 at 01:24, Andrew Pinski <pinskia@gmail.com> wrote:
>> On Tue, Dec 16, 2014 at 2:19 AM, Renlin Li <renlin.li@arm.com> wrote:
>>> Hi all,
>>>
>>> This is a simple patch to add another two ACLE 2.0 predefined macros into
>>> aarch64 backend.
>>> They are __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR. Currently, those
>>> two values are hard-wired to 16.
>>>
>>> The following clauses from ACLE 2.0 documentation indicate the meaning of
>>> those two macros:
>>>
>>> The macro __ARM_ALIGN_MAX_STACK_PWR indicates (as the exponent of a power of
>>> 2) the maximum available stack alignment.
>>> The macro __ARM_ALIGN_MAX_PWR indicates (as the exponent of a power of 2)
>>> the maximum available alignment of static data.
>>>
>>> aarch64-none-elf target is tested on on the model. No new regression.
>>>
>>> Is it Okay for trunk?
>> Have you tested these alignments?  That is have we tested 65536
>> alignment for both stack and static data?
>> I suspect the stack alignment that is support is not 64k but much
>> smaller.  And the supported static data alignment is much larger,
>> maybe 20 or more.
> Looks to me  __ARM_ALIGN_MAX_STACK_PWR can be lifted to 2^16 without
> issue.  GCC won't gripe about the static data alignment until 2^29.
> Aside from the latter being rather conservative I think we should add
> a test case to the testsuite for each. RenLin can you prep a testcase?
>
> /Marcus
Hi Marcus,

Sorry for the delay. I have come up with an updated patch. Two test 
cases are added to check against the limit.

__ARM_ALIGN_MAX_STACK_PWR is hard coded into 16.
__ARM_ALIGN_MAX_PWR  is hard coded into 28 which is the maximum 
allowable alignment user can define for aarch64 backend.


Okay to commit on trunk, and backport to 5.0?

Regards,
Renlin Li

gcc/ChangeLog:

2015-06-04 Renlin Li <renlin.li@arm.com>

     * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Add 
__ARM_ALIGN_MAX_PWR,
     __ARM_ALIGN_MAX_STACK_PWR.


gcc/testsuite/ChangeLog:

2015-06-04  Renlin Li  <renlin.li@arm.com>

     * gcc.target/aarch64/arm_align_max_pwr.c: New.
     * gcc.target/aarch64/arm_align_max_stack_pwr.c: New.


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diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 25b9927..085148d 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -29,6 +29,10 @@
       builtin_define ("__aarch64__");                   \
       builtin_define ("__ARM_64BIT_STATE");             \
       builtin_define_with_int_value                     \
+        ("__ARM_ALIGN_MAX_PWR", 28);                    \
+      builtin_define_with_int_value                     \
+        ("__ARM_ALIGN_MAX_STACK_PWR", 16);              \
+      builtin_define_with_int_value                     \
         ("__ARM_ARCH", aarch64_architecture_version);   \
       cpp_define_formatted                                              \
         (parse_in, "__ARM_ARCH_%dA", aarch64_architecture_version);     \
diff --git a/gcc/testsuite/gcc.target/aarch64/arm_align_max_pwr.c b/gcc/testsuite/gcc.target/aarch64/arm_align_max_pwr.c
new file mode 100644
index 0000000..d8471f5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/arm_align_max_pwr.c
@@ -0,0 +1,15 @@
+/* { dg-do run } */
+
+#include <stdio.h>
+#include <assert.h>
+
+#define align (1ul << __ARM_ALIGN_MAX_PWR)
+static int x __attribute__ ((aligned (align)));
+
+int
+main ()
+{
+  assert ((((unsigned long)&x) & (align - 1)) == 0);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/arm_align_max_stack_pwr.c b/gcc/testsuite/gcc.target/aarch64/arm_align_max_stack_pwr.c
new file mode 100644
index 0000000..e2e7900
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/arm_align_max_stack_pwr.c
@@ -0,0 +1,15 @@
+/* { dg-do run } */
+
+#include <stdio.h>
+#include <assert.h>
+
+#define align (1ul << __ARM_ALIGN_MAX_STACK_PWR)
+
+int
+main ()
+{
+  int x __attribute__ ((aligned (align)));
+
+  assert ((((unsigned long)&x) & (align - 1)) == 0);
+  return 0;
+}

Re: Re: [PATCH][AARCH64]Add ACLE 2.0 predefined macros: __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR

[Marcus Shawcroft]

On 4 June 2015 at 14:36, Renlin Li <renlin.li@arm.com> wrote:

> Hi Marcus,
>
> Sorry for the delay. I have come up with an updated patch. Two test cases
> are added to check against the limit.
>
> __ARM_ALIGN_MAX_STACK_PWR is hard coded into 16.
> __ARM_ALIGN_MAX_PWR  is hard coded into 28 which is the maximum allowable
> alignment user can define for aarch64 backend.
>
>
> Okay to commit on trunk, and backport to 5.0?


OK for trunk. /Marcus