diff --git a/gcc/testsuite/gcc.target/aarch64/fp16/f16_convs_1.c b/gcc/testsuite/gcc.target/aarch64/fp16/f16_convs_1.c new file mode 100644 index 0000000000000000000000000000000000000000..a1c95fd28d14668c5cfa9cfb419c945878d7ac2b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/fp16/f16_convs_1.c @@ -0,0 +1,34 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ +/* { dg-additional-options "-mfp16-format=ieee" {target "arm*-*-*"} } */ + +extern void abort (void); + +#define EPSILON 0.0001 + +int +main (int argc, char **argv) +{ + float f1 = 3.14159f; + float f2 = 2.718f; + /* This 'assembler' statement should be portable between ARM and AArch64. */ + asm volatile ("" : : : "memory"); + __fp16 in1 = f1; + __fp16 in2 = f2; + + /* Do the addition on __fp16's (implicitly converts both operands to + float32, adds, converts back to f16, then we convert back to f32). */ + __fp16 res1 = in1 + in2; + asm volatile ("" : : : "memory"); + float f_res_1 = res1; + + /* Do the addition on float32's (we convert both operands to f32, and add, + as above, but skip the final conversion f32 -> f16 -> f32). */ + float f1a = in1; + float f2a = in2; + float f_res_2 = f1a + f2a; + + if (__builtin_fabs (f_res_2 - f_res_1) > EPSILON) + abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/aarch64/fp16/f16_convs_2.c b/gcc/testsuite/gcc.target/aarch64/fp16/f16_convs_2.c new file mode 100644 index 0000000000000000000000000000000000000000..6aa3e59c15e0eb85595871b47e8d8aa937cca47e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/fp16/f16_convs_2.c @@ -0,0 +1,33 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ +/* { dg-additional-options "-mfp16-format=ieee" {target "arm*-*-*"} } */ + +extern void abort (void); + +#define EPSILON 0.0001 + +int +main (int argc, char **argv) +{ + int i1 = 3; + int i2 = 2; + /* This 'assembler' should be portable across ARM and AArch64. */ + asm volatile ("" : : : "memory"); + + __fp16 in1 = i1; + __fp16 in2 = i2; + + /* Do the addition on __fp16's (implicitly converts both operands to + float32, adds, converts back to f16, then we convert to int). */ + __fp16 res1 = in1 + in2; + asm volatile ("" : : : "memory"); + int result1 = res1; + + /* Do the addition on int's (we convert both operands directly to int, add, + and we're done). */ + int result2 = ((int) in1) + ((int) in2); + + if (__builtin_abs (result2 - result1) > EPSILON) + abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/aarch64/fp16/fp16.exp b/gcc/testsuite/gcc.target/aarch64/fp16/fp16.exp new file mode 100644 index 0000000000000000000000000000000000000000..7dc8d654a34004d280a1e9f6b9f39d868a60464a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/fp16/fp16.exp @@ -0,0 +1,43 @@ +# Tests of 16-bit floating point (__fp16), for both ARM and AArch64. +# Copyright (C) 2015 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# . + +# GCC testsuite that uses the `dg.exp' driver. + +# Exit immediately if this isn't an ARM or AArch64 target. +if {![istarget arm*-*-*] + && ![istarget aarch64*-*-*]} then { + return +} + +# Load support procs. +load_lib gcc-dg.exp + +# If a testcase doesn't have special options, use these. +global DEFAULT_CFLAGS +if ![info exists DEFAULT_CFLAGS] then { + set DEFAULT_CFLAGS " -ansi -pedantic-errors" +} + +# Initialize `dg'. +dg-init + +# Main loop. +dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cC\]]] \ + "" $DEFAULT_CFLAGS + +# All done. +dg-finish