From: Matthew Wahab <matthew.wahab@arm.com>
To: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH 2/3][AArch64][PR target/65697] Strengthen barriers for sync-compare-swap builtins.
Date: Fri, 22 May 2015 08:50:00 -0000 [thread overview]
Message-ID: <555EE8A2.7090907@arm.com> (raw)
In-Reply-To: <555E00AB.9050002@arm.com>
[-- Attachment #1: Type: text/plain, Size: 914 bytes --]
[Added PR number and updated patches]
This patch changes the code generated for __sync_type_compare_and_swap to
ldxr reg; cmp; bne label; stlxr; cbnz; label: dmb ish; mov .., reg
This removes the acquire-barrier from the load and ends the operation with a
fence to prevent memory references appearing after the __sync operation from
being moved ahead of the store-release.
This also strengthens the acquire barrier generated for __sync_lock_test_and_set
(which, like compare-and-swap, is implemented as a form of atomic exchange):
ldaxr; stxr; cbnz
becomes
ldxr; stxr; cbnz; dmb ish
Tested with check-gcc for aarch64-none-linux-gnu.
Ok for trunk?
Matthew
2015-05-22 Matthew Wahab <matthew.wahab@arm.com>
PR target/65697
* config/aarch64/aarch64.c (aarch64_split_compare_and_swap): Check
for __sync memory models, emit appropriate initial and final
barriers.
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0002-AArch64-Strengthen-barriers-for-sync-compare-swap-bu.patch --]
[-- Type: text/x-patch; name=0002-AArch64-Strengthen-barriers-for-sync-compare-swap-bu.patch, Size: 2334 bytes --]
From 1e5cda95944e7176b8934296b1bb1ec4c9fb1362 Mon Sep 17 00:00:00 2001
From: Matthew Wahab <matthew.wahab@arm.com>
Date: Fri, 15 May 2015 09:31:06 +0100
Subject: [PATCH 2/3] [AArch64] Strengthen barriers for sync-compare-swap
builtins.
Change-Id: I335771f2f42ea951d227f20f6cb9daa07330614d
---
gcc/config/aarch64/aarch64.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 182dbad..5b9feee 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -9433,14 +9433,19 @@ aarch64_split_compare_and_swap (rtx operands[])
bool is_weak;
rtx_code_label *label1, *label2;
rtx x, cond;
+ enum memmodel model;
+ rtx model_rtx;
+ rtx load_model_rtx;
rval = operands[0];
mem = operands[1];
oldval = operands[2];
newval = operands[3];
is_weak = (operands[4] != const0_rtx);
+ model_rtx = operands[5];
scratch = operands[7];
mode = GET_MODE (mem);
+ model = memmodel_from_int (INTVAL (model_rtx));
label1 = NULL;
if (!is_weak)
@@ -9450,7 +9455,13 @@ aarch64_split_compare_and_swap (rtx operands[])
}
label2 = gen_label_rtx ();
- aarch64_emit_load_exclusive (mode, rval, mem, operands[5]);
+ /* A __sync operation will end with a fence so the load can be relaxed. */
+ if (is_mm_sync (model))
+ load_model_rtx = GEN_INT (MEMMODEL_RELAXED);
+ else
+ load_model_rtx = model_rtx;
+
+ aarch64_emit_load_exclusive (mode, rval, mem, load_model_rtx);
cond = aarch64_gen_compare_reg (NE, rval, oldval);
x = gen_rtx_NE (VOIDmode, cond, const0_rtx);
@@ -9458,7 +9469,7 @@ aarch64_split_compare_and_swap (rtx operands[])
gen_rtx_LABEL_REF (Pmode, label2), pc_rtx);
aarch64_emit_unlikely_jump (gen_rtx_SET (pc_rtx, x));
- aarch64_emit_store_exclusive (mode, scratch, mem, newval, operands[5]);
+ aarch64_emit_store_exclusive (mode, scratch, mem, newval, model_rtx);
if (!is_weak)
{
@@ -9475,6 +9486,10 @@ aarch64_split_compare_and_swap (rtx operands[])
}
emit_label (label2);
+
+ /* A __sync operation may need a final fence. */
+ if (is_mm_sync (model))
+ aarch64_emit_post_barrier (model);
}
/* Split an atomic operation. */
--
1.9.1
next prev parent reply other threads:[~2015-05-22 8:28 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-21 15:59 [PATCH 1/3][AArch64] Strengthen barriers for sync-fetch-op builtins Matthew Wahab
2015-05-21 16:00 ` [AArch64][PATCH 2/3] Strengthen barriers for sync-compare-swap builtins Matthew Wahab
2015-05-22 8:50 ` Matthew Wahab [this message]
2015-06-01 12:08 ` [PATCH 2/3][AArch64][PR target/65697] " Matthew Wahab
2015-06-01 12:14 ` James Greenhalgh
2015-05-21 16:03 ` [PATCH 3/3][Aarch64] Add tests for __sync_builtins Matthew Wahab
2015-05-22 8:51 ` [PATCH 3/3][Aarch64][PR target/65697] " Matthew Wahab
2015-05-26 10:11 ` James Greenhalgh
2015-05-22 8:30 ` [PATCH 1/3][AArch64][PR target/65697] Strengthen barriers for sync-fetch-op builtins Matthew Wahab
2015-05-22 11:47 ` [PATCH 1/3][AArch64] " Ramana Radhakrishnan
2015-05-22 12:15 ` Matthew Wahab
2015-05-26 9:52 ` James Greenhalgh
2015-06-01 12:06 ` [PATCH 1/3][AArch64][PR target/65797] " Matthew Wahab
2015-06-01 12:15 ` James Greenhalgh
2015-06-01 14:00 ` Marcus Shawcroft
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=555EE8A2.7090907@arm.com \
--to=matthew.wahab@arm.com \
--cc=gcc-patches@gcc.gnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).