From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 48216 invoked by alias); 4 Jun 2015 15:59:30 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 48203 invoked by uid 89); 4 Jun 2015 15:59:29 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.5 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 04 Jun 2015 15:59:28 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EAEC575; Thu, 4 Jun 2015 08:59:32 -0700 (PDT) Received: from [10.2.207.50] (e100706-lin.cambridge.arm.com [10.2.207.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D08243F32C; Thu, 4 Jun 2015 08:59:26 -0700 (PDT) Message-ID: <557075DD.6060702@foss.arm.com> Date: Thu, 04 Jun 2015 16:03:00 -0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: GCC Patches CC: Ramana Radhakrishnan , Richard Earnshaw Subject: Re: [PATCH][ARM] Restrict MAX_CONDITIONAL_EXECUTE when -mrestrict-it is in place References: <5559BE41.8040909@foss.arm.com> <55659BA5.5010709@foss.arm.com> In-Reply-To: <55659BA5.5010709@foss.arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2015-06/txt/msg00425.txt.bz2 Ping. https://gcc.gnu.org/ml/gcc-patches/2015-05/msg02405.html Thanks, Kyrill On 27/05/15 11:25, Kyrill Tkachov wrote: > Ping. > > Here is the rebased (and retested) patch after Christian's series. > > Thanks, > Kyrill > > On 18/05/15 11:26, Kyrill Tkachov wrote: >> Hi all, >> >> When using the short Thumb2 IT blocks we want to also restrict ifcvt so that it will not end up generating a number of back-to-back cond_execs >> that will later end up being back to back single-instruction IT blocks. Branching over them should be a better choice. >> >> This patch implements that by setting max_insns_skipped to 1 when arm_restrict_it. >> >> With this patch, I've seen GCC replace a number of sequences in places like SPEC2006 from: >> it eq >> moveq r1, r5 >> it ne >> movne r1, r10 >> it eq >> moveq r8, r4 >> >> to a branch over them. >> >> Bootstrapped and tested on arm. >> Ok for trunk? >> >> Thanks, >> Kyrill >> >> 2015-05-18 Kyrylo Tkachov >> >> * config/arm/arm.c (arm_option_params_internal): When optimising >> for speed set max_insns_skipped when arm_restrict_it. >> >> 2015-05-18 Kyrylo Tkachov >> >> * gcc.target/arm/short-it-ifcvt-1.c: New test. >> * gcc.target/arm/short-it-ifcvt-2.c: Likewise.