From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 27339 invoked by alias); 8 Jun 2015 09:44:27 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 27326 invoked by uid 89); 8 Jun 2015 09:44:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (207.82.80.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 08 Jun 2015 09:44:22 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by uk-mta-34.uk.mimecast.lan; Mon, 08 Jun 2015 10:44:18 +0100 Received: from [10.2.207.65] ([10.1.2.79]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 8 Jun 2015 10:44:18 +0100 Message-ID: <557563F2.8060400@arm.com> Date: Mon, 08 Jun 2015 10:08:00 -0000 From: Alan Lawrence User-Agent: Thunderbird 2.0.0.24 (X11/20101213) MIME-Version: 1.0 To: Charles Baylis CC: GCC Patches , Tejas Belagod , Marcus Shawcroft , Richard Earnshaw Subject: Re: [PATCH] [AArch64] PR63870 Improve error messages for NEON single lane memory access intrinsics References: In-Reply-To: X-MC-Unique: n5IEejJVQcCPZOInLrPWUQ-1 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2015-06/txt/msg00543.txt.bz2 Oh, have you tested bigendian? --Alan Charles Baylis wrote: > This is another attempt at fixing this PR63870 for AArch64 (ARM is > still to come). >=20 > As before, the Q register variants are handled by moving the check for > the lane bounds into builtin expansion. The handling of lane numbers > is made consistent wrt endianess with other NEON single lane > operations - lane numbers in RTL are flipped for big-endian, and > flipped back at assembly time. >=20 > The D register variants are now handled by adding new builtins for all > the 64bit operations. These behave identically to Q register variants, > except that the permitted lane bounds are different. >=20 > In the iterators used by the relevant patterns are changed from VQ and > VALLDIF so that the correct vector sizes are used in the endian-flip > at assembly time. >=20 > Finally, a set of machine-generated test cases is added. These do need > to be in separate files, because of testsuite limitations. >=20 > Regression tested on qemu for aarch64-linux-gnu with no regressions > and all new tests pass. >=20 > OK for trunk? >=20 >=20 > gcc/ChangeLog: >=20 > Charles Baylis >=20 > PR target/63870 > * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers): > Add qualifier_struct_load_store_lane_index. > (aarch64_types_loadstruct_lane_qualifiers): Use > qualifier_struct_load_store_lane_index for lane index argument for > last argument. > (aarch64_types_storestruct_lane_qualifiers): Ditto. > (builtin_simd_arg): Add SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX. > (aarch64_simd_expand_args): Add new argument describing mode of > builtin. Check lane bounds for arguments with > SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX. > (aarch64_simd_expand_builtin): Emit error for incorrect lane indices > if marked with SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX. > (aarch64_simd_expand_builtin): Handle arguments with > qualifier_struct_load_store_lane_index. Pass machine mode of builtin = to > aarch64_simd_expand_args. > * config/aarch64/aarch64-simd-builtins.def: Declare ld[234]_lane and > vst[234]_lane with BUILTIN_VALLDIF. > * config/aarch64/aarch64-simd.md: > (aarch64_vec_load_lanesoi_lane): Use VALLDIF iterator. Perform > endianness reversal on lane index. > (aarch64_vec_load_lanesci_lane): Ditto. > (aarch64_vec_load_lanesxi_lane): Ditto. > (vec_store_lanesoi_lane): Use VALLDIF iterator. Fix typo > in attribute. > (vec_store_lanesci_lane): Use VALLDIF iterator. > (vec_store_lanesxi_lane): Ditto. > (aarch64_ld2_lane): Use VALLDIF iterator. Remove endianness > reversal of lane index. > (aarch64_ld3_lane): Ditto. > (aarch64_ld4_lane): Ditto. > (aarch64_st2_lane): Ditto. > (aarch64_st3_lane): Ditto. > (aarch64_st4_lane): Ditto. > * config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Rename mode parameter > to qmode. Add new mode parameter. Update uses. > (__LD3_LANE_FUNC): Ditto. > (__LD4_LANE_FUNC): Ditto. > (__ST2_LANE_FUNC): Ditto. > (__ST3_LANE_FUNC): Ditto. > (__ST4_LANE_FUNC): Ditto. >=20 >=20 > Charles Baylis >=20 > * gcc.target/aarch64/simd/vld2_lane_f32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2_lane_f64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2_lane_p8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2_lane_s16_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2_lane_s32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2_lane_s64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2_lane_s8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2_lane_u16_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2_lane_u32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2_lane_u64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2_lane_u8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2q_lane_f32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2q_lane_f64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2q_lane_p8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2q_lane_s16_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2q_lane_s32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2q_lane_s64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2q_lane_s8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2q_lane_u16_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2q_lane_u32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2q_lane_u64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld2q_lane_u8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3_lane_f32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3_lane_f64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3_lane_p8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3_lane_s16_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3_lane_s32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3_lane_s64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3_lane_s8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3_lane_u16_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3_lane_u32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3_lane_u64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3_lane_u8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3q_lane_f32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3q_lane_f64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3q_lane_p8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3q_lane_s16_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3q_lane_s32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3q_lane_s64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3q_lane_s8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3q_lane_u16_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3q_lane_u32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3q_lane_u64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld3q_lane_u8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4_lane_f32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4_lane_f64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4_lane_p8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4_lane_s16_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4_lane_s32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4_lane_s64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4_lane_s8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4_lane_u16_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4_lane_u32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4_lane_u64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4_lane_u8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4q_lane_f32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4q_lane_f64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4q_lane_p8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4q_lane_s16_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4q_lane_s32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4q_lane_s64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4q_lane_s8_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4q_lane_u16_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4q_lane_u32_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4q_lane_u64_indices_1.c: New test. > * gcc.target/aarch64/simd/vld4q_lane_u8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2_lane_f32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2_lane_f64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2_lane_p8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2_lane_s16_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2_lane_s32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2_lane_s64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2_lane_s8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2_lane_u16_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2_lane_u32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2_lane_u64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2_lane_u8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2q_lane_f32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2q_lane_f64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2q_lane_p8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2q_lane_s16_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2q_lane_s32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2q_lane_s64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2q_lane_s8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2q_lane_u16_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2q_lane_u32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2q_lane_u64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst2q_lane_u8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3_lane_f32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3_lane_f64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3_lane_p8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3_lane_s16_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3_lane_s32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3_lane_s64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3_lane_s8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3_lane_u16_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3_lane_u32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3_lane_u64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3_lane_u8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3q_lane_f32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3q_lane_f64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3q_lane_p8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3q_lane_s16_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3q_lane_s32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3q_lane_s64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3q_lane_s8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3q_lane_u16_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3q_lane_u32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3q_lane_u64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst3q_lane_u8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4_lane_f32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4_lane_f64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4_lane_p8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4_lane_s16_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4_lane_s32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4_lane_s64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4_lane_s8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4_lane_u16_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4_lane_u32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4_lane_u64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4_lane_u8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4q_lane_f32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4q_lane_f64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4q_lane_p8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4q_lane_s16_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4q_lane_s32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4q_lane_s64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4q_lane_s8_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4q_lane_u16_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4q_lane_u32_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4q_lane_u64_indices_1.c: New test. > * gcc.target/aarch64/simd/vst4q_lane_u8_indices_1.c: New test.