commit 9db83ab2f7763f84445763150642fe418b06b1fe
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date:   Thu Apr 2 13:37:20 2015 +0100

    [ARM] Add debug dumping of cost table fields.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 737d824..cae3c02 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -9322,6 +9322,12 @@ arm_unspec_cost (rtx x, enum rtx_code /* outer_code */, bool speed_p, int *cost)
 	  }								\
 	while (0);
 
+
+#define DBG_COST(F) (((debug_rtx_costs	\
+		       && dump_file && (dump_flags & TDF_DETAILS))	\
+  ? fprintf (dump_file, "using "#F" with cost %d from line %d\n",	\
+    (F), __LINE__) : 0), (F))
+
 /* RTX costs.  Make an estimate of the cost of executing the operation
    X, which is contained with an operation with code OUTER_CODE.
    SPEED_P indicates whether the cost desired is the performance cost,
@@ -9422,7 +9428,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		  + arm_address_cost (XEXP (x, 0), mode,
 				      ADDR_SPACE_GENERIC, speed_p));
 #else
-        *cost += extra_cost->ldst.load;
+        *cost += DBG_COST (extra_cost->ldst.load);
 #endif
       return true;
 
@@ -9450,11 +9456,11 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    {
 	      HOST_WIDE_INT nregs = XVECLEN (x, 0);
 	      HOST_WIDE_INT regs_per_insn_1st = is_ldm
-	                              ? extra_cost->ldst.ldm_regs_per_insn_1st
-	                              : extra_cost->ldst.stm_regs_per_insn_1st;
+		? DBG_COST (extra_cost->ldst.ldm_regs_per_insn_1st)
+		: DBG_COST (extra_cost->ldst.stm_regs_per_insn_1st);
 	      HOST_WIDE_INT regs_per_insn_sub = is_ldm
-	                       ? extra_cost->ldst.ldm_regs_per_insn_subsequent
-	                       : extra_cost->ldst.stm_regs_per_insn_subsequent;
+		? DBG_COST (extra_cost->ldst.ldm_regs_per_insn_subsequent)
+		: DBG_COST (extra_cost->ldst.stm_regs_per_insn_subsequent);
 
 	      *cost += regs_per_insn_1st
 	               + COSTS_N_INSNS (((MAX (nregs - regs_per_insn_1st, 0))
@@ -9471,9 +9477,10 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
       if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
 	  && (mode == SFmode || !TARGET_VFP_SINGLE))
 	*cost += COSTS_N_INSNS (speed_p
-			       ? extra_cost->fp[mode != SFmode].div : 0);
+			? DBG_COST (extra_cost->fp[mode != SFmode].div) : 0);
       else if (mode == SImode && TARGET_IDIV)
-	*cost += COSTS_N_INSNS (speed_p ? extra_cost->mult[0].idiv : 0);
+	*cost += COSTS_N_INSNS (speed_p ? DBG_COST (extra_cost->mult[0].idiv)
+					 : 0);
       else
 	*cost = LIBCALL_COST (2);
       return false;	/* All arguments must be in registers.  */
@@ -9489,7 +9496,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  *cost += (COSTS_N_INSNS (1)
 		   + rtx_cost (XEXP (x, 0), code, 0, speed_p));
 	  if (speed_p)
-	    *cost += extra_cost->alu.shift_reg;
+	    *cost += DBG_COST (extra_cost->alu.shift_reg);
 	  return true;
 	}
       /* Fall through */
@@ -9502,7 +9509,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  *cost += (COSTS_N_INSNS (2)
 		   + rtx_cost (XEXP (x, 0), code, 0, speed_p));
 	  if (speed_p)
-	    *cost += 2 * extra_cost->alu.shift;
+	    *cost += DBG_COST (2 * extra_cost->alu.shift);
 	  return true;
 	}
       else if (mode == SImode)
@@ -9510,7 +9517,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
 	  /* Slightly disparage register shifts at -Os, but not by much.  */
 	  if (!CONST_INT_P (XEXP (x, 1)))
-	    *cost += (speed_p ? extra_cost->alu.shift_reg : 1
+	    *cost += (speed_p ? DBG_COST (extra_cost->alu.shift_reg) : 1
 		      + rtx_cost (XEXP (x, 1), code, 1, speed_p));
 	  return true;
 	}
@@ -9523,7 +9530,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	      /* Slightly disparage register shifts at -Os, but not by
 	         much.  */
 	      if (!CONST_INT_P (XEXP (x, 1)))
-		*cost += (speed_p ? extra_cost->alu.shift_reg : 1
+		*cost += (speed_p ? DBG_COST (extra_cost->alu.shift_reg) : 1
 			  + rtx_cost (XEXP (x, 1), code, 1, speed_p));
 	    }
 	  else if (code == LSHIFTRT || code == ASHIFTRT)
@@ -9532,7 +9539,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		{
 		  /* Can use SBFX/UBFX.  */
 		  if (speed_p)
-		    *cost += extra_cost->alu.bfx;
+		    *cost += DBG_COST (extra_cost->alu.bfx);
 		  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
 		}
 	      else
@@ -9542,10 +9549,10 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		  if (speed_p)
 		    {
 		      if (CONST_INT_P (XEXP (x, 1)))
-			*cost += 2 * extra_cost->alu.shift;
+			*cost += 2 * DBG_COST (extra_cost->alu.shift);
 		      else
-			*cost += (extra_cost->alu.shift
-				  + extra_cost->alu.shift_reg);
+			*cost += (DBG_COST (extra_cost->alu.shift)
+				  + DBG_COST (extra_cost->alu.shift_reg));
 		    }
 		  else
 		    /* Slightly disparage register shifts.  */
@@ -9559,12 +9566,12 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	      if (speed_p)
 		{
 		  if (CONST_INT_P (XEXP (x, 1)))
-		    *cost += (2 * extra_cost->alu.shift
-			      + extra_cost->alu.log_shift);
+		    *cost += (DBG_COST (2 * extra_cost->alu.shift)
+			      + DBG_COST (extra_cost->alu.log_shift));
 		  else
-		    *cost += (extra_cost->alu.shift
-			      + extra_cost->alu.shift_reg
-			      + extra_cost->alu.log_shift_reg);
+		    *cost += (DBG_COST (extra_cost->alu.shift)
+			      + DBG_COST (extra_cost->alu.shift_reg)
+			      + DBG_COST (extra_cost->alu.log_shift_reg));
 		}
 	    }
 	  return true;
@@ -9579,7 +9586,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
           if (mode == SImode)
             {
               if (speed_p)
-                *cost += extra_cost->alu.rev;
+                *cost += DBG_COST (extra_cost->alu.rev);
 
               return false;
             }
@@ -9594,8 +9601,8 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 
               if (speed_p)
                 {
-                  *cost += 6 * extra_cost->alu.shift;
-                  *cost += 3 * extra_cost->alu.logical;
+                  *cost += DBG_COST (6 * extra_cost->alu.shift);
+                  *cost += DBG_COST (3 * extra_cost->alu.logical);
                 }
             }
           else
@@ -9604,9 +9611,9 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 
               if (speed_p)
                 {
-                  *cost += 2 * extra_cost->alu.shift;
-                  *cost += extra_cost->alu.arith_shift;
-                  *cost += 2 * extra_cost->alu.logical;
+                  *cost += DBG_COST (2 * extra_cost->alu.shift);
+                  *cost += DBG_COST (extra_cost->alu.arith_shift);
+                  *cost += DBG_COST (2 * extra_cost->alu.logical);
                 }
             }
           return true;
@@ -9623,7 +9630,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	      rtx mul_op0, mul_op1, sub_op;
 
 	      if (speed_p)
-		*cost += extra_cost->fp[mode != SFmode].mult_addsub;
+		*cost += DBG_COST (extra_cost->fp[mode != SFmode].mult_addsub);
 
 	      if (GET_CODE (XEXP (x, 0)) == MULT)
 		{
@@ -9651,7 +9658,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    }
 
 	  if (speed_p)
-	    *cost += extra_cost->fp[mode != SFmode].addsub;
+	    *cost += DBG_COST (extra_cost->fp[mode != SFmode].addsub);
 	  return false;
 	}
 
@@ -9675,11 +9682,11 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	      if (shift_by_reg != NULL)
 		{
 		  if (speed_p)
-		    *cost += extra_cost->alu.arith_shift_reg;
+		    *cost += DBG_COST (extra_cost->alu.arith_shift_reg);
 		  *cost += rtx_cost (shift_by_reg, code, 0, speed_p);
 		}
 	      else if (speed_p)
-		*cost += extra_cost->alu.arith_shift;
+		*cost += DBG_COST (extra_cost->alu.arith_shift);
 
 	      *cost += (rtx_cost (shift_op, code, 0, speed_p)
 			+ rtx_cost (non_shift_op, code, 0, speed_p));
@@ -9691,7 +9698,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    {
 	      /* MLS.  */
 	      if (speed_p)
-		*cost += extra_cost->mult[0].add;
+		*cost += DBG_COST (extra_cost->mult[0].add);
 	      *cost += (rtx_cost (XEXP (x, 0), MINUS, 0, speed_p)
 			+ rtx_cost (XEXP (XEXP (x, 1), 0), MULT, 0, speed_p)
 			+ rtx_cost (XEXP (XEXP (x, 1), 1), MULT, 1, speed_p));
@@ -9705,12 +9712,12 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 					    NULL_RTX, 1, 0);
 	      *cost = COSTS_N_INSNS (insns);
 	      if (speed_p)
-		*cost += insns * extra_cost->alu.arith;
+		*cost += insns * DBG_COST (extra_cost->alu.arith);
 	      *cost += rtx_cost (XEXP (x, 1), code, 1, speed_p);
 	      return true;
 	    }
 	  else if (speed_p)
-	    *cost += extra_cost->alu.arith;
+	    *cost += DBG_COST (extra_cost->alu.arith);
 
 	  return false;
 	}
@@ -9730,7 +9737,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  /* Slightly disparage, as we might need to widen the result.  */
 	  *cost += 1;
 	  if (speed_p)
-	    *cost += extra_cost->alu.arith;
+	    *cost += DBG_COST (extra_cost->alu.arith);
 
 	  if (CONST_INT_P (XEXP (x, 0)))
 	    {
@@ -9750,7 +9757,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	      rtx op1 = XEXP (x, 1);
 
 	      if (speed_p)
-		*cost += 2 * extra_cost->alu.arith;
+		*cost += DBG_COST (2 * extra_cost->alu.arith);
 
 	      if (GET_CODE (op1) == ZERO_EXTEND)
 		*cost += rtx_cost (XEXP (op1, 0), ZERO_EXTEND, 0, speed_p);
@@ -9763,7 +9770,8 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  else if (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND)
 	    {
 	      if (speed_p)
-		*cost += extra_cost->alu.arith + extra_cost->alu.arith_shift;
+		*cost += DBG_COST (extra_cost->alu.arith
+				    + extra_cost->alu.arith_shift);
 	      *cost += (rtx_cost (XEXP (XEXP (x, 0), 0), SIGN_EXTEND,
 				  0, speed_p)
 			+ rtx_cost (XEXP (x, 1), MINUS, 1, speed_p));
@@ -9773,10 +9781,10 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		   || GET_CODE (XEXP (x, 1)) == SIGN_EXTEND)
 	    {
 	      if (speed_p)
-		*cost += (extra_cost->alu.arith
+		*cost += (DBG_COST (extra_cost->alu.arith)
 			  + (GET_CODE (XEXP (x, 1)) == ZERO_EXTEND
-			     ? extra_cost->alu.arith
-			     : extra_cost->alu.arith_shift));
+			     ? DBG_COST (extra_cost->alu.arith)
+			     : DBG_COST (extra_cost->alu.arith_shift)));
 	      *cost += (rtx_cost (XEXP (x, 0), MINUS, 0, speed_p)
 			+ rtx_cost (XEXP (XEXP (x, 1), 0),
 				    GET_CODE (XEXP (x, 1)), 0, speed_p));
@@ -9784,7 +9792,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    }
 
 	  if (speed_p)
-	    *cost += 2 * extra_cost->alu.arith;
+	    *cost += DBG_COST (2 * extra_cost->alu.arith);
 	  return false;
 	}
 
@@ -9802,7 +9810,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	      rtx mul_op0, mul_op1, add_op;
 
 	      if (speed_p)
-		*cost += extra_cost->fp[mode != SFmode].mult_addsub;
+		*cost += DBG_COST (extra_cost->fp[mode != SFmode].mult_addsub);
 
 	      mul_op0 = XEXP (XEXP (x, 0), 0);
 	      mul_op1 = XEXP (XEXP (x, 0), 1);
@@ -9816,7 +9824,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    }
 
 	  if (speed_p)
-	    *cost += extra_cost->fp[mode != SFmode].addsub;
+	    *cost += DBG_COST (extra_cost->fp[mode != SFmode].addsub);
 	  return false;
 	}
       else if (GET_MODE_CLASS (mode) == MODE_FLOAT)
@@ -9844,7 +9852,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 					    NULL_RTX, 1, 0);
 	      *cost = COSTS_N_INSNS (insns);
 	      if (speed_p)
-		*cost += insns * extra_cost->alu.arith;
+		*cost += insns * DBG_COST (extra_cost->alu.arith);
 	      /* Slightly penalize a narrow operation as the result may
 		 need widening.  */
 	      *cost += 1 + rtx_cost (XEXP (x, 0), PLUS, 0, speed_p);
@@ -9855,7 +9863,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	     need widening.  */
 	  *cost += 1;
 	  if (speed_p)
-	    *cost += extra_cost->alu.arith;
+	    *cost += DBG_COST (extra_cost->alu.arith);
 
 	  return false;
 	}
@@ -9870,7 +9878,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    {
 	      /* UXTA[BH] or SXTA[BH].  */
 	      if (speed_p)
-		*cost += extra_cost->alu.extend_arith;
+		*cost += DBG_COST (extra_cost->alu.extend_arith);
 	      *cost += (rtx_cost (XEXP (XEXP (x, 0), 0), ZERO_EXTEND, 0,
 				  speed_p)
 			+ rtx_cost (XEXP (x, 1), PLUS, 0, speed_p));
@@ -9884,11 +9892,11 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	      if (shift_reg)
 		{
 		  if (speed_p)
-		    *cost += extra_cost->alu.arith_shift_reg;
+		    *cost += DBG_COST (extra_cost->alu.arith_shift_reg);
 		  *cost += rtx_cost (shift_reg, ASHIFT, 1, speed_p);
 		}
 	      else if (speed_p)
-		*cost += extra_cost->alu.arith_shift;
+		*cost += DBG_COST (extra_cost->alu.arith_shift);
 
 	      *cost += (rtx_cost (shift_op, ASHIFT, 0, speed_p)
 			+ rtx_cost (XEXP (x, 1), PLUS, 1, speed_p));
@@ -9915,7 +9923,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		{
 		  /* SMLA[BT][BT].  */
 		  if (speed_p)
-		    *cost += extra_cost->mult[0].extend_add;
+		    *cost += DBG_COST (extra_cost->mult[0].extend_add);
 		  *cost += (rtx_cost (XEXP (XEXP (mul_op, 0), 0),
 				      SIGN_EXTEND, 0, speed_p)
 			    + rtx_cost (XEXP (XEXP (mul_op, 1), 0),
@@ -9938,12 +9946,12 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 					    NULL_RTX, 1, 0);
 	      *cost = COSTS_N_INSNS (insns);
 	      if (speed_p)
-		*cost += insns * extra_cost->alu.arith;
+		*cost += insns * DBG_COST (extra_cost->alu.arith);
 	      *cost += rtx_cost (XEXP (x, 0), PLUS, 0, speed_p);
 	      return true;
 	    }
 	  else if (speed_p)
-	    *cost += extra_cost->alu.arith;
+	    *cost += DBG_COST (extra_cost->alu.arith);
 
 	  return false;
 	}
@@ -9958,7 +9966,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		      && GET_CODE (XEXP (XEXP (x, 0), 1)) == SIGN_EXTEND)))
 	    {
 	      if (speed_p)
-		*cost += extra_cost->mult[1].extend_add;
+		*cost += DBG_COST (extra_cost->mult[1].extend_add);
 	      *cost += (rtx_cost (XEXP (XEXP (XEXP (x, 0), 0), 0),
 				  ZERO_EXTEND, 0, speed_p)
 			+ rtx_cost (XEXP (XEXP (XEXP (x, 0), 1), 0),
@@ -9973,10 +9981,10 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	      || GET_CODE (XEXP (x, 0)) == SIGN_EXTEND)
 	    {
 	      if (speed_p)
-		*cost += (extra_cost->alu.arith
+		*cost += (DBG_COST (extra_cost->alu.arith)
 			  + (GET_CODE (XEXP (x, 0)) == ZERO_EXTEND
-			     ? extra_cost->alu.arith
-			     : extra_cost->alu.arith_shift));
+			     ? DBG_COST (extra_cost->alu.arith)
+			     : DBG_COST (extra_cost->alu.arith_shift)));
 
 	      *cost += (rtx_cost (XEXP (XEXP (x, 0), 0), ZERO_EXTEND, 0,
 				  speed_p)
@@ -9985,7 +9993,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    }
 
 	  if (speed_p)
-	    *cost += 2 * extra_cost->alu.arith;
+	    *cost += DBG_COST (2 * extra_cost->alu.arith);
 	  return false;
 	}
 
@@ -10000,7 +10008,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
             *cost += rtx_cost (inner, BSWAP, 0 , speed_p);
 
             if (speed_p)
-              *cost += extra_cost->alu.rev;
+              *cost += DBG_COST (extra_cost->alu.rev);
 
             return true;
           }
@@ -10025,11 +10033,11 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	      if (shift_reg)
 		{
 		  if (speed_p)
-		    *cost += extra_cost->alu.log_shift_reg;
+		    *cost += DBG_COST (extra_cost->alu.log_shift_reg);
 		  *cost += rtx_cost (shift_reg, ASHIFT, 1, speed_p);
 		}
 	      else if (speed_p)
-		*cost += extra_cost->alu.log_shift;
+		*cost += DBG_COST (extra_cost->alu.log_shift);
 
 	      *cost += (rtx_cost (shift_op, ASHIFT, 0, speed_p)
 			+ rtx_cost (XEXP (x, 1), code, 1, speed_p));
@@ -10044,13 +10052,13 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 
 	      *cost = COSTS_N_INSNS (insns);
 	      if (speed_p)
-		*cost += insns * extra_cost->alu.logical;
+		*cost += insns * DBG_COST (extra_cost->alu.logical);
 	      *cost += rtx_cost (op0, code, 0, speed_p);
 	      return true;
 	    }
 
 	  if (speed_p)
-	    *cost += extra_cost->alu.logical;
+	    *cost += DBG_COST (extra_cost->alu.logical);
 	  *cost += (rtx_cost (op0, code, 0, speed_p)
 		    + rtx_cost (XEXP (x, 1), code, 1, speed_p));
 	  return true;
@@ -10071,7 +10079,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  if (GET_CODE (op0) == ZERO_EXTEND)
 	    {
 	      if (speed_p)
-		*cost += 2 * extra_cost->alu.logical;
+		*cost += DBG_COST (2 * extra_cost->alu.logical);
 
 	      *cost += (rtx_cost (XEXP (op0, 0), ZERO_EXTEND, 0, speed_p)
 			+ rtx_cost (XEXP (x, 1), code, 0, speed_p));
@@ -10080,7 +10088,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  else if (GET_CODE (op0) == SIGN_EXTEND)
 	    {
 	      if (speed_p)
-		*cost += extra_cost->alu.logical + extra_cost->alu.log_shift;
+		*cost += DBG_COST (extra_cost->alu.logical + extra_cost->alu.log_shift);
 
 	      *cost += (rtx_cost (XEXP (op0, 0), SIGN_EXTEND, 0, speed_p)
 			+ rtx_cost (XEXP (x, 1), code, 0, speed_p));
@@ -10088,7 +10096,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    }
 
 	  if (speed_p)
-	    *cost += 2 * extra_cost->alu.logical;
+	    *cost += DBG_COST (2 * extra_cost->alu.logical);
 
 	  return true;
 	}
@@ -10107,7 +10115,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    op0 = XEXP (op0, 0);
 
 	  if (speed_p)
-	    *cost += extra_cost->fp[mode != SFmode].mult;
+	    *cost += DBG_COST (extra_cost->fp[mode != SFmode].mult);
 
 	  *cost += (rtx_cost (op0, MULT, 0, speed_p)
 		    + rtx_cost (XEXP (x, 1), MULT, 1, speed_p));
@@ -10138,13 +10146,13 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    {
 	      /* SMUL[TB][TB].  */
 	      if (speed_p)
-		*cost += extra_cost->mult[0].extend;
+		*cost += DBG_COST (extra_cost->mult[0].extend);
 	      *cost += (rtx_cost (XEXP (x, 0), SIGN_EXTEND, 0, speed_p)
 			+ rtx_cost (XEXP (x, 1), SIGN_EXTEND, 0, speed_p));
 	      return true;
 	    }
 	  if (speed_p)
-	    *cost += extra_cost->mult[0].simple;
+	    *cost += DBG_COST (extra_cost->mult[0].simple);
 	  return false;
 	}
 
@@ -10157,7 +10165,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		      && GET_CODE (XEXP (x, 1)) == SIGN_EXTEND)))
 	    {
 	      if (speed_p)
-		*cost += extra_cost->mult[1].extend;
+		*cost += DBG_COST (extra_cost->mult[1].extend);
 	      *cost += (rtx_cost (XEXP (XEXP (x, 0), 0),
 				  ZERO_EXTEND, 0, speed_p)
 			+ rtx_cost (XEXP (XEXP (x, 1), 0),
@@ -10178,7 +10186,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  && (mode == SFmode || !TARGET_VFP_SINGLE))
 	{
 	  if (speed_p)
-	    *cost += extra_cost->fp[mode != SFmode].neg;
+	    *cost += DBG_COST (extra_cost->fp[mode != SFmode].neg);
 
 	  return false;
 	}
@@ -10195,8 +10203,8 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	      *cost += COSTS_N_INSNS (1);
 	      /* Assume the non-flag-changing variant.  */
 	      if (speed_p)
-		*cost += (extra_cost->alu.log_shift
-			  + extra_cost->alu.arith_shift);
+		*cost += (DBG_COST (extra_cost->alu.log_shift)
+			  + DBG_COST (extra_cost->alu.arith_shift));
 	      *cost += rtx_cost (XEXP (XEXP (x, 0), 0), ABS, 0, speed_p);
 	      return true;
 	    }
@@ -10218,13 +10226,13 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 			    + rtx_cost (XEXP (XEXP (x, 0), 1), COMPARE, 1,
 					speed_p));
 		  if (speed_p)
-		    *cost += extra_cost->alu.arith;
+		    *cost += DBG_COST (extra_cost->alu.arith);
 		}
 	      return true;
 	    }
 
 	  if (speed_p)
-	    *cost += extra_cost->alu.arith;
+	    *cost += DBG_COST (extra_cost->alu.arith);
 	  return false;
 	}
 
@@ -10234,7 +10242,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  /* Slightly disparage, as we might need an extend operation.  */
 	  *cost += 1;
 	  if (speed_p)
-	    *cost += extra_cost->alu.arith;
+	    *cost += DBG_COST (extra_cost->alu.arith);
 	  return false;
 	}
 
@@ -10242,7 +10250,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	{
 	  *cost += COSTS_N_INSNS (1);
 	  if (speed_p)
-	    *cost += 2 * extra_cost->alu.arith;
+	    *cost += 2 * DBG_COST (extra_cost->alu.arith);
 	  return false;
 	}
 
@@ -10263,17 +10271,17 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	      if (shift_reg != NULL)
 		{
 		  if (speed_p)
-		    *cost += extra_cost->alu.log_shift_reg;
+		    *cost += DBG_COST (extra_cost->alu.log_shift_reg);
 		  *cost += rtx_cost (shift_reg, ASHIFT, 1, speed_p);
 		}
 	      else if (speed_p)
-		*cost += extra_cost->alu.log_shift;
+		*cost += DBG_COST (extra_cost->alu.log_shift);
 	      *cost += rtx_cost (shift_op, ASHIFT, 0, speed_p);
 	      return true;
 	    }
 
 	  if (speed_p)
-	    *cost += extra_cost->alu.logical;
+	    *cost += DBG_COST (extra_cost->alu.logical);
 	  return false;
 	}
       if (mode == DImode)
@@ -10310,9 +10318,9 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    if (speed_p)
 	      {
 		if (extra_cost->alu.non_exec_costs_exec)
-		  *cost += op1cost + op2cost + extra_cost->alu.non_exec;
+		  *cost += op1cost + op2cost + DBG_COST (extra_cost->alu.non_exec);
 		else
-		  *cost += MAX (op1cost, op2cost) + extra_cost->alu.non_exec;
+		  *cost += MAX (op1cost, op2cost) + DBG_COST (extra_cost->alu.non_exec);
 	      }
 	    else
 	      *cost += op1cost + op2cost;
@@ -10335,7 +10343,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	      && (op0mode == SFmode || !TARGET_VFP_SINGLE))
 	    {
 	      if (speed_p)
-		*cost += extra_cost->fp[op0mode != SFmode].compare;
+		*cost += DBG_COST (extra_cost->fp[op0mode != SFmode].compare);
 
 	      if (XEXP (x, 1) == CONST0_RTX (op0mode))
 		{
@@ -10356,7 +10364,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    {
 	      *cost += COSTS_N_INSNS (1);
 	      if (speed_p)
-		*cost += 2 * extra_cost->alu.arith;
+		*cost += DBG_COST (2 * extra_cost->alu.arith);
 	      return false;
 	    }
 
@@ -10377,14 +10385,14 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		  if (speed_p
 		      && GET_CODE (XEXP (x, 0)) == MULT
 		      && !power_of_two_operand (XEXP (XEXP (x, 0), 1), mode))
-		    *cost += extra_cost->mult[0].flag_setting;
+		    *cost += DBG_COST (extra_cost->mult[0].flag_setting);
 
 		  if (speed_p
 		      && GET_CODE (XEXP (x, 0)) == PLUS
 		      && GET_CODE (XEXP (XEXP (x, 0), 0)) == MULT
 		      && !power_of_two_operand (XEXP (XEXP (XEXP (x, 0),
 							    0), 1), mode))
-		    *cost += extra_cost->mult[0].flag_setting;
+		    *cost += DBG_COST (extra_cost->mult[0].flag_setting);
 		  return true;
 		}
 
@@ -10396,17 +10404,17 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		    {
 		      *cost += rtx_cost (shift_reg, ASHIFT, 1, speed_p);
 		      if (speed_p)
-			*cost += extra_cost->alu.arith_shift_reg;
+			*cost += DBG_COST (extra_cost->alu.arith_shift_reg);
 		    }
 		  else if (speed_p)
-		    *cost += extra_cost->alu.arith_shift;
+		    *cost += DBG_COST (extra_cost->alu.arith_shift);
 		  *cost += (rtx_cost (shift_op, ASHIFT, 0, speed_p)
 			    + rtx_cost (XEXP (x, 1), COMPARE, 1, speed_p));
 		  return true;
 		}
 
 	      if (speed_p)
-		*cost += extra_cost->alu.arith;
+		*cost += DBG_COST (extra_cost->alu.arith);
 	      if (CONST_INT_P (XEXP (x, 1))
 		  && const_ok_for_op (INTVAL (XEXP (x, 1)), COMPARE))
 		{
@@ -10458,7 +10466,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		case LT:
 		  /* LSR Rd, Rn, #31.  */
 		  if (speed_p)
-		    *cost += extra_cost->alu.shift;
+		    *cost += DBG_COST (extra_cost->alu.shift);
 		  break;
 
 		case EQ:
@@ -10476,7 +10484,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		     ADC  Rd, Rn, T1. */
 		  *cost += COSTS_N_INSNS (1);
 		  if (speed_p)
-		    *cost += extra_cost->alu.arith_shift;
+		    *cost += DBG_COST (extra_cost->alu.arith_shift);
 		  break;
 
 		case GT:
@@ -10484,8 +10492,8 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		     LSR  Rd, Rd, #31.  */
 		  *cost += COSTS_N_INSNS (1);
 		  if (speed_p)
-		    *cost += (extra_cost->alu.arith_shift
-			      + extra_cost->alu.shift);
+		    *cost += (DBG_COST (extra_cost->alu.arith_shift)
+			      + DBG_COST (extra_cost->alu.shift));
 		  break;
 
 		case GE:
@@ -10493,7 +10501,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		     ADD  Rd, Rn, #1.  */
 		  *cost += COSTS_N_INSNS (1);
 		  if (speed_p)
-		    *cost += extra_cost->alu.shift;
+		    *cost += DBG_COST (extra_cost->alu.shift);
 		  break;
 
 		default:
@@ -10536,7 +10544,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  && (mode == SFmode || !TARGET_VFP_SINGLE))
 	{
 	  if (speed_p)
-	    *cost += extra_cost->fp[mode != SFmode].neg;
+	    *cost += DBG_COST (extra_cost->fp[mode != SFmode].neg);
 
 	  return false;
 	}
@@ -10549,7 +10557,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
       if (mode == SImode)
 	{
 	  if (speed_p)
-	    *cost += extra_cost->alu.log_shift + extra_cost->alu.arith_shift;
+	    *cost += DBG_COST (extra_cost->alu.log_shift + extra_cost->alu.arith_shift);
 	  return false;
 	}
       /* Vector mode?  */
@@ -10569,12 +10577,12 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	    return true;
 
 	  if (GET_MODE (XEXP (x, 0)) == SImode)
-	    *cost += extra_cost->ldst.load;
+	    *cost += DBG_COST (extra_cost->ldst.load);
 	  else
-	    *cost += extra_cost->ldst.load_sign_extend;
+	    *cost += DBG_COST (extra_cost->ldst.load_sign_extend);
 
 	  if (mode == DImode)
-	    *cost += extra_cost->alu.shift;
+	    *cost += DBG_COST (extra_cost->alu.shift);
 
 	  return true;
 	}
@@ -10585,7 +10593,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  /* We have SXTB/SXTH.  */
 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
 	  if (speed_p)
-	    *cost += extra_cost->alu.extend;
+	    *cost += DBG_COST (extra_cost->alu.extend);
 	}
       else if (GET_MODE (XEXP (x, 0)) != SImode)
 	{
@@ -10593,7 +10601,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  *cost += COSTS_N_INSNS (1);
 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
 	  if (speed_p)
-	    *cost += 2 * extra_cost->alu.shift;
+	    *cost += DBG_COST (2 * extra_cost->alu.shift);
 	}
 
       /* Widening beyond 32-bits requires one more insn.  */
@@ -10601,7 +10609,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	{
 	  *cost += COSTS_N_INSNS (1);
 	  if (speed_p)
-	    *cost += extra_cost->alu.shift;
+	    *cost += DBG_COST (extra_cost->alu.shift);
 	}
 
       return true;
@@ -10629,14 +10637,14 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	     AND, and we don't really model 16-bit vs 32-bit insns
 	     here.  */
 	  if (speed_p)
-	    *cost += extra_cost->alu.logical;
+	    *cost += DBG_COST (extra_cost->alu.logical);
 	}
       else if (GET_MODE (XEXP (x, 0)) != SImode && arm_arch6)
 	{
 	  /* We have UXTB/UXTH.  */
 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
 	  if (speed_p)
-	    *cost += extra_cost->alu.extend;
+	    *cost += DBG_COST (extra_cost->alu.extend);
 	}
       else if (GET_MODE (XEXP (x, 0)) != SImode)
 	{
@@ -10647,7 +10655,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  *cost += COSTS_N_INSNS (1);
 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
 	  if (speed_p)
-	    *cost += 2 * extra_cost->alu.shift;
+	    *cost += DBG_COST (2 * extra_cost->alu.shift);
 	}
 
       /* Widening beyond 32-bits requires one more insn.  */
@@ -10708,7 +10716,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  if (arm_arch_thumb2 && !flag_pic)
 	    *cost += COSTS_N_INSNS (1);
 	  else
-	    *cost += extra_cost->ldst.load;
+	    *cost += DBG_COST (extra_cost->ldst.load);
 	}
       else
 	*cost += COSTS_N_INSNS (1);
@@ -10717,7 +10725,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	{
 	  *cost += COSTS_N_INSNS (1);
 	  if (speed_p)
-	    *cost += extra_cost->alu.arith;
+	    *cost += DBG_COST (extra_cost->alu.arith);
 	}
 
       return true;
@@ -10734,16 +10742,16 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  if (vfp3_const_double_rtx (x))
 	    {
 	      if (speed_p)
-		*cost += extra_cost->fp[mode == DFmode].fpconst;
+		*cost += DBG_COST (extra_cost->fp[mode == DFmode].fpconst);
 	      return true;
 	    }
 
 	  if (speed_p)
 	    {
 	      if (mode == DFmode)
-		*cost += extra_cost->ldst.loadd;
+		*cost += DBG_COST (extra_cost->ldst.loadd);
 	      else
-		*cost += extra_cost->ldst.loadf;
+		*cost += DBG_COST (extra_cost->ldst.loadf);
 	    }
 	  else
 	    *cost += COSTS_N_INSNS (1 + (mode == DFmode));
@@ -10774,14 +10782,14 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 
     case CLZ:
       if (speed_p)
-	*cost += extra_cost->alu.clz;
+	*cost += DBG_COST (extra_cost->alu.clz);
       return false;
 
     case SMIN:
       if (XEXP (x, 1) == const0_rtx)
 	{
 	  if (speed_p)
-	    *cost += extra_cost->alu.log_shift;
+	    *cost += DBG_COST (extra_cost->alu.log_shift);
 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
 	  return true;
 	}
@@ -10804,7 +10812,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		      == ZERO_EXTEND))))
 	{
 	  if (speed_p)
-	    *cost += extra_cost->mult[1].extend;
+	    *cost += DBG_COST (extra_cost->mult[1].extend);
 	  *cost += (rtx_cost (XEXP (XEXP (XEXP (x, 0), 0), 0), ZERO_EXTEND, 0,
 			      speed_p)
 		    + rtx_cost (XEXP (XEXP (XEXP (x, 0), 0), 1), ZERO_EXTEND,
@@ -10834,14 +10842,14 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  && CONST_INT_P (XEXP (x, 2)))
 	{
 	  if (speed_p)
-	    *cost += extra_cost->alu.bfx;
+	    *cost += DBG_COST (extra_cost->alu.bfx);
 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
 	  return true;
 	}
       /* Without UBFX/SBFX, need to resort to shift operations.  */
       *cost += COSTS_N_INSNS (1);
       if (speed_p)
-	*cost += 2 * extra_cost->alu.shift;
+	*cost += DBG_COST (2 * extra_cost->alu.shift);
       *cost += rtx_cost (XEXP (x, 0), ASHIFT, 0, speed_p);
       return true;
 
@@ -10849,7 +10857,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
       if (TARGET_HARD_FLOAT)
 	{
 	  if (speed_p)
-	    *cost += extra_cost->fp[mode == DFmode].widen;
+	    *cost += DBG_COST (extra_cost->fp[mode == DFmode].widen);
 	  if (!TARGET_FPU_ARMV8
 	      && GET_MODE (XEXP (x, 0)) == HFmode)
 	    {
@@ -10857,7 +10865,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	         widening to SFmode.  */
 	      *cost += COSTS_N_INSNS (1);
 	      if (speed_p)
-		*cost += extra_cost->fp[0].widen;
+		*cost += DBG_COST (extra_cost->fp[0].widen);
 	    }
 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
 	  return true;
@@ -10870,7 +10878,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
       if (TARGET_HARD_FLOAT)
 	{
 	  if (speed_p)
-	    *cost += extra_cost->fp[mode == DFmode].narrow;
+	    *cost += DBG_COST (extra_cost->fp[mode == DFmode].narrow);
 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
 	  return true;
 	  /* Vector modes?  */
@@ -10899,7 +10907,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
           *cost += rtx_cost (op2, FMA, 2, speed_p);
 
           if (speed_p)
-            *cost += extra_cost->fp[mode ==DFmode].fma;
+            *cost += DBG_COST (extra_cost->fp[mode ==DFmode].fma);
 
           return true;
         }
@@ -10914,7 +10922,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  if (GET_MODE_CLASS (mode) == MODE_INT)
 	    {
 	      if (speed_p)
-		*cost += extra_cost->fp[GET_MODE (XEXP (x, 0)) == DFmode].toint;
+		*cost += DBG_COST (extra_cost->fp[GET_MODE (XEXP (x, 0)) == DFmode].toint);
 	      /* Strip of the 'cost' of rounding towards zero.  */
 	      if (GET_CODE (XEXP (x, 0)) == FIX)
 		*cost += rtx_cost (XEXP (XEXP (x, 0), 0), code, 0, speed_p);
@@ -10928,7 +10936,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 		   && TARGET_FPU_ARMV8)
 	    {
 	      if (speed_p)
-		*cost += extra_cost->fp[mode == DFmode].roundint;
+		*cost += DBG_COST (extra_cost->fp[mode == DFmode].roundint);
 	      return false;
 	    }
 	  /* Vector costs? */
@@ -10943,7 +10951,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
 	  /* ??? Increase the cost to deal with transferring from CORE
 	     -> FP registers?  */
 	  if (speed_p)
-	    *cost += extra_cost->fp[mode == DFmode].fromint;
+	    *cost += DBG_COST (extra_cost->fp[mode == DFmode].fromint);
 	  return false;
 	}
       *cost = LIBCALL_COST (1);
@@ -11016,7 +11024,7 @@ arm_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
 				    &generic_extra_costs, total, speed);
     }
 
-  if (dump_file && (dump_flags & TDF_DETAILS))
+  if (debug_rtx_costs && dump_file && (dump_flags & TDF_DETAILS))
     {
       print_rtl_single (dump_file, x);
       fprintf (dump_file, "\n%s cost: %d (%s)\n", speed ? "Hot" : "Cold",
diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
index d4ff164..1f29125 100644
--- a/gcc/config/arm/arm.opt
+++ b/gcc/config/arm/arm.opt
@@ -277,3 +277,7 @@ Assume loading data from flash is slower than fetching instructions.
 masm-syntax-unified
 Target Report Var(inline_asm_unified) Init(0)
 Assume unified syntax for Thumb inline assembly code.
+
+mdebug-rtx-costs
+Target Undocumented Var(debug_rtx_costs) Init(0)
+Dump more detailed rtx costs in debug dumps.