From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 17673 invoked by alias); 22 Jun 2015 16:17:31 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 17663 invoked by uid 89); 22 Jun 2015 16:17:31 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (146.101.78.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 22 Jun 2015 16:17:29 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-1-YrVYJ4XYSDCtn-XTelEGuQ-1 Received: from e106327-lin.cambridge.arm.com ([10.1.2.79]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 22 Jun 2015 17:17:27 +0100 Message-ID: <55883517.9060709@arm.com> Date: Mon, 22 Jun 2015 16:17:00 -0000 From: Matthew Wahab User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: gcc-patches Subject: [Aarch64] Expand +rdma documentation, small changes to march and mcpu text. X-MC-Unique: YrVYJ4XYSDCtn-XTelEGuQ-1 Content-Type: multipart/mixed; boundary="------------080109050002080509070508" X-IsSubscribed: yes X-SW-Source: 2015-06/txt/msg01461.txt.bz2 This is a multi-part message in MIME format. --------------080109050002080509070508 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Content-length: 781 Hello, The documentation for the ARMv8.1 +rdma option doesn't mention that enablin= g it also implies enabling Adv.SIMD. This patch fixes that. The documentation for the -march and -mcpu options are also a little messy,= this patch tries to make the text clearer and adds a (texinfo) link to the subse= ction documenting the feature modifiers. Tested by checking the html output. Ok for trunk? Matthew 2015-06-22 Matthew Wahab * doc/invoke.texi (Aarch64 Options, -march): Split out arch and feature description, split out the native option, add a link to the feature documentation, rearrange and slightly rewrite text. (Aarch64 options, -mcpu): Likewise. (Aarch64 options, Feature Modifiers): Add an anchor. Mention +rdma implies Adv. SIMD. --------------080109050002080509070508 Content-Type: text/x-patch; name=aarch64_options_doc.patch Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="aarch64_options_doc.patch" Content-length: 5895 diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index b99ab1c..599dbf0 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -12426,24 +12426,26 @@ corresponding flag to the linker. @opindex march Specify the name of the target architecture, optionally suffixed by one or more feature modifiers. This option has the form -@option{-march=3D@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}, where= the -permissible values for @var{arch} are @samp{armv8-a} or @samp{armv8.1-a}. -The permissible values for @var{feature} are documented in the sub-section -below. Additionally on native AArch64 GNU/Linux systems the value +@option{-march=3D@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}. + +The permissible values for @var{arch} are @samp{armv8-a} or +@samp{armv8.1-a}. + +For the permissible values for @var{feature}, see the sub-section on +@ref{aarch64-feature-modifiers,,@option{-march} and @option{-mcpu} +Feature Modifiers}. Where conflicting feature modifiers are +specified, the right-most feature is used. + +Additionally on native AArch64 GNU/Linux systems the value @samp{native} is available. This option causes the compiler to pick the architecture of the host system. If the compiler is unable to recognize t= he architecture of the host system this option has no effect. =20 -Where conflicting feature modifiers are specified, the right-most feature = is -used. - -GCC uses this name to determine what kind of instructions it can emit when -generating assembly code. - -Where @option{-march} is specified without either of @option{-mtune} -or @option{-mcpu} also being specified, the code is tuned to perform -well across a range of target processors implementing the target -architecture. +GCC uses @var{name} to determine what kind of instructions it can emit +when generating assembly code. If @option{-march} is specified +without either of @option{-mtune} or @option{-mcpu} also being +specified, the code is tuned to perform well across a range of target +processors implementing the target architecture. =20 @item -mtune=3D@var{name} @opindex mtune @@ -12456,12 +12458,11 @@ Additionally, this option can specify that GCC sh= ould tune the performance of the code for a big.LITTLE system. Permissible values for this option are: @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}. =20 -Additionally on native AArch64 GNU/Linux systems the value @samp{native} -is available. -This option causes the compiler to pick the architecture of and tune the -performance of the code for the processor of the host system. -If the compiler is unable to recognize the processor of the host system -this option has no effect. +Additionally on native AArch64 GNU/Linux systems the value +@samp{native} is available. This option causes the compiler to pick +the architecture of and tune the performance of the code for the +processor of the host system. If the compiler is unable to recognize +the processor of the host system this option has no effect. =20 Where none of @option{-mtune=3D}, @option{-mcpu=3D} or @option{-march=3D} are specified, the code is tuned to perform well across a range @@ -12471,23 +12472,23 @@ This option cannot be suffixed by feature modifie= rs. =20 @item -mcpu=3D@var{name} @opindex mcpu -Specify the name of the target processor, optionally suffixed by one or mo= re -feature modifiers. This option has the form -@option{-mcpu=3D@var{cpu}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}, where t= he -permissible values for @var{cpu} are the same as those available for -@option{-mtune}. Additionally on native AArch64 GNU/Linux systems the -value @samp{native} is available. -This option causes the compiler to tune the performance of the code for the -processor of the host system. If the compiler is unable to recognize the -processor of the host system this option has no effect. - -The permissible values for @var{feature} are documented in the sub-section -below. - -Where conflicting feature modifiers are specified, the right-most feature = is -used. +Specify the name of the target processor, optionally suffixed by one +or more feature modifiers. This option has the form +@option{-mcpu=3D@var{cpu}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}, where +the permissible values for @var{cpu} are the same as those available +for @option{-mtune}. The permissible values for @var{feature} are +documented in the sub-section on +@ref{aarch64-feature-modifiers,,@option{-march} and @option{-mcpu} +Feature Modifiers}. Where conflicting feature modifiers are +specified, the right-most feature is used. + +Additionally on native AArch64 GNU/Linux systems the value +@samp{native} is available. This option causes the compiler to tune +the performance of the code for the processor of the host system. If +the compiler is unable to recognize the processor of the host system +this option has no effect. =20 -GCC uses this name to determine what kind of instructions it can emit when +GCC uses @var{name} to determine what kind of instructions it can emit when generating assembly code (as if by @option{-march}) and to determine the target processor for which to tune for performance (as if by @option{-mtune}). Where this option is used in conjunction @@ -12496,6 +12497,7 @@ over the appropriate part of this option. @end table =20 @subsubsection @option{-march} and @option{-mcpu} Feature Modifiers +@anchor{aarch64-feature-modifiers} @cindex @option{-march} feature modifiers @cindex @option{-mcpu} feature modifiers Feature modifiers used with @option{-march} and @option{-mcpu} can be one @@ -12519,7 +12521,8 @@ Enable Privileged Access Never support. @item lor Enable Limited Ordering Regions support. @item rdma -Enable ARMv8.1 Advanced SIMD instructions. +Enable ARMv8.1 Advanced SIMD instructions. This implies Advanced SIMD +is enabled. @end table =20 @node Adapteva Epiphany Options --------------080109050002080509070508--