From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 79063 invoked by alias); 10 Jul 2015 08:47:28 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 79027 invoked by uid 89); 10 Jul 2015 08:47:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.6 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (146.101.78.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 10 Jul 2015 08:47:26 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-13-g4kOCXQyRviVKjov96CVyA-1; Fri, 10 Jul 2015 09:47:21 +0100 Received: from [10.2.207.50] ([10.1.2.79]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 10 Jul 2015 09:47:20 +0100 Message-ID: <559F8698.8080301@arm.com> Date: Fri, 10 Jul 2015 08:47:00 -0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: "pinskia@gmail.com" CC: GCC Patches , James Greenhalgh , Marcus Shawcroft , Richard Earnshaw Subject: Re: [PATCH][AArch64] Improve csinc/csneg/csinv opportunities on immediates References: <559F8398.8000305@arm.com> <9CCA6AEA-8A0F-44D6-914A-504A2649A7B6@gmail.com> In-Reply-To: <9CCA6AEA-8A0F-44D6-914A-504A2649A7B6@gmail.com> X-MC-Unique: g4kOCXQyRviVKjov96CVyA-1 Content-Type: text/plain; charset=WINDOWS-1252; format=flowed Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2015-07/txt/msg00849.txt.bz2 Hi Andrew, On 10/07/15 09:40, pinskia@gmail.com wrote: > > > >> On Jul 10, 2015, at 1:34 AM, Kyrill Tkachov wro= te: >> >> Hi all, >> >> Currently when evaluating expressions like (a ? 24 : 25) we will move 24= and 25 into >> registers and perform a csel on them. This misses the opportunity to in= stead move just 24 >> into a register and then perform a csinc, saving us an instruction and a= register use. >> Similarly for csneg and csinv. >> >> This patch implements that idea by allowing such pairs of immediates in = *cmov_insn >> and adding an early splitter that performs the necessary transformation. >> >> The testcase included in the patch demonstrates the kind of opportunitie= s that are now picked up. >> >> With this patch I see about 9.6% more csinc instructions being generated= for SPEC2006 >> and the generated code looks objectively better (i.e. fewer mov-immediat= es and slightly >> lower register pressure). >> >> Bootstrapped and tested on aarch64. >> >> Ok for trunk? > I think this is the wrong place for this optimization. It should happen i= n expr.c and we should produce cond_expr on the gimple level. I had considered it, but I wasn't sure how general the conditional incremen= t/negate/inverse operations are to warrant a midend implementation. Do you mean the expand_cond_expr_= using_cmove function in expr.c? >=20=20=20 > > I have patches to do both but I have not got around to cleaning them up. = If anyone wants them, I can send a link to my current gcc 5.1 sources with = them included. Any chance you can post them on gcc-patches even as a rough idea of what ne= eds to be done? Thanks, Kyrill >=20=20=20 > > Thanks, > Andrew > >> Thanks, >> Kyrill >> >> 2015-07-10 Kyrylo Tkachov >> >> * config/aarch64/aarch64.md (*cmov_insn): Move stricter >> check for operands 3 and 4 to pattern predicate. Allow immediates >> that can be expressed as csinc/csneg/csinv. New define_split. >> (*csinv3_insn): Rename to... >> (csinv3_insn): ... This. >> * config/aarch64/aarch64.h (AARCH64_IMMS_OK_FOR_CSNEG): New macro. >> (AARCH64_IMMS_OK_FOR_CSINC): Likewise. >> (AARCH64_IMMS_OK_FOR_CSINV): Likewise. >> * config/aarch64/aarch64.c (aarch64_imms_ok_for_cond_op_1): >> New function. >> (aarch64_imms_ok_for_cond_op): Likewise. >> * config/aarch64/aarch64-protos.h (aarch64_imms_ok_for_cond_op_1): >> Declare prototype. >> (aarch64_imms_ok_for_cond_op): Likewise. >> >> 2015-07-10 Kyrylo Tkachov >> >> * gcc.target/aarch64/cond-op-imm_1.c: New test. >>