* [ARM] Correct spelling of references to ARMv6KZ
@ 2015-06-24 9:54 Matthew Wahab
2015-07-23 10:59 ` Matthew Wahab
0 siblings, 1 reply; 5+ messages in thread
From: Matthew Wahab @ 2015-06-24 9:54 UTC (permalink / raw)
To: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 1531 bytes --]
Hello,
GCC supports ARM architecture ARMv6KZ but refers to it as ARMv6ZK. This is made
visible by the command line option -march=armv6zk and by the predefined macro
__ARM_ARCH_6ZK__.
This patch corrects the spelling internally and adds -march=armv6kz. To preserve
existing behaviour, -march=armv6zk is kept as an alias of -march=armv6kz and
both __ARM_ARCH_6KZ__ and __ARM_ARCH_6ZK__ macros are defined for the
architecture.
Use of -march=arm6kz will need to wait for binutils to be updated, a patch has
been submitted (https://sourceware.org/ml/binutils/2015-06/msg00236.html). Use
of the existing spelling, -march=arm6zk, still works with current binutils.
Tested arm-none-linux-gnueabihf with check-gcc.
Ok for trunk?
Matthew
gcc/
2015-15-24 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-arches.def: Add "armv6kz". Replace 6ZK with 6KZ
and FL_FOR_ARCH6ZK with FL_FOR_ARCH6KZ.
* config/arm/arm-c.c (arm_cpu_builtins): Emit "__ARM_ARCH_6ZK__"
for armv6kz targets.
* config/arm/arm-cores.def: Replace 6ZK with 6KZ.
* config/arm/arm-protos.h (FL_ARCH6KZ): New.
(FL_FOR_ARCH6ZK): Remove.
(FL_FOR_ARCH6KZ): New.
(arm_arch6zk): New declaration.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm.c (arm_arch6kz): New.
(arm_option_override): Set arm_arch6kz.
* config/arm/arm.h (BASE_ARCH_6ZK): Rename to BASE_ARCH_6KZ.
* config/arm/driver-arm.c: Add "armv6kz".
* doc/invoke.texi: Replace "armv6zk" with "armv6kz" and
"armv6zkt2" with "armv6kzt2".
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: archv6kz.patch --]
[-- Type: text/x-patch; name=archv6kz.patch, Size: 8206 bytes --]
diff --git a/gcc/config/arm/arm-arches.def b/gcc/config/arm/arm-arches.def
index 840c1ff..3dafaa5 100644
--- a/gcc/config/arm/arm-arches.def
+++ b/gcc/config/arm/arm-arches.def
@@ -44,7 +44,8 @@ ARM_ARCH("armv6", arm1136js, 6, FL_CO_PROC | FL_FOR_ARCH6)
ARM_ARCH("armv6j", arm1136js, 6J, FL_CO_PROC | FL_FOR_ARCH6J)
ARM_ARCH("armv6k", mpcore, 6K, FL_CO_PROC | FL_FOR_ARCH6K)
ARM_ARCH("armv6z", arm1176jzs, 6Z, FL_CO_PROC | FL_FOR_ARCH6Z)
-ARM_ARCH("armv6zk", arm1176jzs, 6ZK, FL_CO_PROC | FL_FOR_ARCH6ZK)
+ARM_ARCH("armv6kz", arm1176jzs, 6KZ, FL_CO_PROC | FL_FOR_ARCH6KZ)
+ARM_ARCH("armv6zk", arm1176jzs, 6KZ, FL_CO_PROC | FL_FOR_ARCH6KZ)
ARM_ARCH("armv6t2", arm1156t2s, 6T2, FL_CO_PROC | FL_FOR_ARCH6T2)
ARM_ARCH("armv6-m", cortexm1, 6M, FL_FOR_ARCH6M)
ARM_ARCH("armv6s-m", cortexm1, 6M, FL_FOR_ARCH6M)
diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 6aa59ad..e2d458c 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -169,6 +169,11 @@ arm_cpu_builtins (struct cpp_reader* pfile, int flags)
}
if (arm_arch_iwmmxt2)
builtin_define ("__IWMMXT2__");
+ /* ARMv6KZ was originally identified as the misspelled __ARM_ARCH_6ZK__. To
+ preserve the existing behaviour, the misspelled feature macro must still be
+ defined. */
+ if (arm_arch6kz)
+ builtin_define ("__ARM_ARCH_6ZK__");
if (TARGET_AAPCS_BASED)
{
if (arm_pcs_default == ARM_PCS_AAPCS_VFP)
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index 103c314..9d47fcf 100644
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -125,8 +125,8 @@ ARM_CORE("arm1026ej-s", arm1026ejs, arm1026ejs, 5TEJ, FL_LDSCHED, 9e)
/* V6 Architecture Processors */
ARM_CORE("arm1136j-s", arm1136js, arm1136js, 6J, FL_LDSCHED, 9e)
ARM_CORE("arm1136jf-s", arm1136jfs, arm1136jfs, 6J, FL_LDSCHED | FL_VFPV2, 9e)
-ARM_CORE("arm1176jz-s", arm1176jzs, arm1176jzs, 6ZK, FL_LDSCHED, 9e)
-ARM_CORE("arm1176jzf-s", arm1176jzfs, arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e)
+ARM_CORE("arm1176jz-s", arm1176jzs, arm1176jzs, 6KZ, FL_LDSCHED, 9e)
+ARM_CORE("arm1176jzf-s", arm1176jzfs, arm1176jzfs, 6KZ, FL_LDSCHED | FL_VFPV2, 9e)
ARM_CORE("mpcorenovfp", mpcorenovfp, mpcorenovfp, 6K, FL_LDSCHED, 9e)
ARM_CORE("mpcore", mpcore, mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e)
ARM_CORE("arm1156t2-s", arm1156t2s, arm1156t2s, 6T2, FL_LDSCHED, v6t2)
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 62f91ef..7aae934 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -382,6 +382,7 @@ extern bool arm_is_constant_pool_ref (rtx);
#define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */
#define FL_IWMMXT2 (1 << 30) /* "Intel Wireless MMX2 technology". */
+#define FL_ARCH6KZ (1 << 31) /* ARMv6KZ architecture. */
/* Flags that only effect tuning, not available instructions. */
#define FL_TUNE (FL_WBUF | FL_VFPV2 | FL_STRONG | FL_LDSCHED \
@@ -401,7 +402,7 @@ extern bool arm_is_constant_pool_ref (rtx);
#define FL_FOR_ARCH6J FL_FOR_ARCH6
#define FL_FOR_ARCH6K (FL_FOR_ARCH6 | FL_ARCH6K)
#define FL_FOR_ARCH6Z FL_FOR_ARCH6
-#define FL_FOR_ARCH6ZK FL_FOR_ARCH6K
+#define FL_FOR_ARCH6KZ (FL_FOR_ARCH6K | FL_ARCH6KZ)
#define FL_FOR_ARCH6T2 (FL_FOR_ARCH6 | FL_THUMB2)
#define FL_FOR_ARCH6M (FL_FOR_ARCH6 & ~FL_NOTM)
#define FL_FOR_ARCH7 ((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7)
@@ -441,6 +442,9 @@ extern int arm_arch6;
/* Nonzero if this chip supports the ARM 6K extensions. */
extern int arm_arch6k;
+/* Nonzero if this chip supports the ARM 6KZ extensions. */
+extern int arm_arch6kz;
+
/* Nonzero if instructions present in ARMv6-M can be used. */
extern int arm_arch6m;
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index 510e745..77e44aa 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -371,46 +371,49 @@ EnumValue
Enum(arm_arch) String(armv6z) Value(13)
EnumValue
-Enum(arm_arch) String(armv6zk) Value(14)
+Enum(arm_arch) String(armv6kz) Value(14)
EnumValue
-Enum(arm_arch) String(armv6t2) Value(15)
+Enum(arm_arch) String(armv6zk) Value(15)
EnumValue
-Enum(arm_arch) String(armv6-m) Value(16)
+Enum(arm_arch) String(armv6t2) Value(16)
EnumValue
-Enum(arm_arch) String(armv6s-m) Value(17)
+Enum(arm_arch) String(armv6-m) Value(17)
EnumValue
-Enum(arm_arch) String(armv7) Value(18)
+Enum(arm_arch) String(armv6s-m) Value(18)
EnumValue
-Enum(arm_arch) String(armv7-a) Value(19)
+Enum(arm_arch) String(armv7) Value(19)
EnumValue
-Enum(arm_arch) String(armv7ve) Value(20)
+Enum(arm_arch) String(armv7-a) Value(20)
EnumValue
-Enum(arm_arch) String(armv7-r) Value(21)
+Enum(arm_arch) String(armv7ve) Value(21)
EnumValue
-Enum(arm_arch) String(armv7-m) Value(22)
+Enum(arm_arch) String(armv7-r) Value(22)
EnumValue
-Enum(arm_arch) String(armv7e-m) Value(23)
+Enum(arm_arch) String(armv7-m) Value(23)
EnumValue
-Enum(arm_arch) String(armv8-a) Value(24)
+Enum(arm_arch) String(armv7e-m) Value(24)
EnumValue
-Enum(arm_arch) String(armv8-a+crc) Value(25)
+Enum(arm_arch) String(armv8-a) Value(25)
EnumValue
-Enum(arm_arch) String(iwmmxt) Value(26)
+Enum(arm_arch) String(armv8-a+crc) Value(26)
EnumValue
-Enum(arm_arch) String(iwmmxt2) Value(27)
+Enum(arm_arch) String(iwmmxt) Value(27)
+
+EnumValue
+Enum(arm_arch) String(iwmmxt2) Value(28)
Enum
Name(arm_fpu) Type(int)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index ced4231..77340c7 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -810,6 +810,9 @@ int arm_arch6 = 0;
/* Nonzero if this chip supports the ARM 6K extensions. */
int arm_arch6k = 0;
+/* Nonzero if this chip supports the ARM 6KZ extensions. */
+int arm_arch6kz = 0;
+
/* Nonzero if instructions present in ARMv6-M can be used. */
int arm_arch6m = 0;
@@ -3052,6 +3055,7 @@ arm_option_override (void)
arm_arch5e = (insn_flags & FL_ARCH5E) != 0;
arm_arch6 = (insn_flags & FL_ARCH6) != 0;
arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
+ arm_arch6kz = arm_arch6k && (insn_flags & FL_ARCH6KZ);
arm_arch_notm = (insn_flags & FL_NOTM) != 0;
arm_arch6m = arm_arch6 && !arm_arch_notm;
arm_arch7 = (insn_flags & FL_ARCH7) != 0;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 373dc85..046bb28 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -374,7 +374,7 @@ enum base_architecture
BASE_ARCH_5TEJ = 5,
BASE_ARCH_6 = 6,
BASE_ARCH_6J = 6,
- BASE_ARCH_6ZK = 6,
+ BASE_ARCH_6KZ = 6,
BASE_ARCH_6K = 6,
BASE_ARCH_6T2 = 6,
BASE_ARCH_6M = 6,
diff --git a/gcc/config/arm/driver-arm.c b/gcc/config/arm/driver-arm.c
index c715bb7..7873606 100644
--- a/gcc/config/arm/driver-arm.c
+++ b/gcc/config/arm/driver-arm.c
@@ -35,6 +35,7 @@ static struct vendor_cpu arm_cpu_table[] = {
{"0xb02", "armv6k", "mpcore"},
{"0xb36", "armv6j", "arm1136j-s"},
{"0xb56", "armv6t2", "arm1156t2-s"},
+ {"0xb76", "armv6kz", "arm1176jz-s"},
{"0xb76", "armv6zk", "arm1176jz-s"},
{"0xc05", "armv7-a", "cortex-a5"},
{"0xc07", "armv7ve", "cortex-a7"},
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index b99ab1c..987e279 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -13292,7 +13292,7 @@ of the @option{-mcpu=} option. Permissible names are: @samp{armv2},
@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
@samp{armv5}, @samp{armv5t}, @samp{armv5e}, @samp{armv5te},
@samp{armv6}, @samp{armv6j},
-@samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, @samp{armv6-m},
+@samp{armv6t2}, @samp{armv6z}, @samp{armv6kz}, @samp{armv6zk}, @samp{armv6-m},
@samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, @samp{armv7e-m},
@samp{armv7ve}, @samp{armv8-a}, @samp{armv8-a+crc},
@samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [ARM] Correct spelling of references to ARMv6KZ
2015-06-24 9:54 [ARM] Correct spelling of references to ARMv6KZ Matthew Wahab
@ 2015-07-23 10:59 ` Matthew Wahab
2015-07-23 11:16 ` Kyrill Tkachov
0 siblings, 1 reply; 5+ messages in thread
From: Matthew Wahab @ 2015-07-23 10:59 UTC (permalink / raw)
To: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 2561 bytes --]
On 24/06/15 10:25, Matthew Wahab wrote:
Ping. Attached updated patch which also actually removes "armv6zk" from
doc/invoke.texi.
Also, retested:
- arm-none-linux-gnueabihf native bootstrap and cross-compiled make checck.
- arm-none-eabi: cross-compiled make check.
gcc/
2015-07-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-arches.def: Add "armv6kz". Replace 6ZK with 6KZ
and FL_FOR_ARCH6ZK with FL_FOR_ARCH6KZ.
* config/arm/arm-c.c (arm_cpu_builtins): Emit "__ARM_ARCH_6ZK__"
for armv6kz targets.
* config/arm/arm-cores.def: Replace 6ZK with 6KZ.
* config/arm/arm-protos.h (FL_ARCH6KZ): New.
(FL_FOR_ARCH6ZK): Remove.
(FL_FOR_ARCH6KZ): New.
(arm_arch6zk): New declaration.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm.c (arm_arch6kz): New.
(arm_option_override): Set arm_arch6kz.
* config/arm/arm.h (BASE_ARCH_6ZK): Rename to BASE_ARCH_6KZ.
* config/arm/driver-arm.c: Add "armv6kz".
* doc/invoke.texi: Replace "armv6zk" with "armv6kz".
> Hello,
>
> GCC supports ARM architecture ARMv6KZ but refers to it as ARMv6ZK. This is made
> visible by the command line option -march=armv6zk and by the predefined macro
> __ARM_ARCH_6ZK__.
>
> This patch corrects the spelling internally and adds -march=armv6kz. To preserve
> existing behaviour, -march=armv6zk is kept as an alias of -march=armv6kz and
> both __ARM_ARCH_6KZ__ and __ARM_ARCH_6ZK__ macros are defined for the
> architecture.
>
> Use of -march=arm6kz will need to wait for binutils to be updated, a patch has
> been submitted (https://sourceware.org/ml/binutils/2015-06/msg00236.html). Use
> of the existing spelling, -march=arm6zk, still works with current binutils.
>
> Tested arm-none-linux-gnueabihf with check-gcc.
>
> Ok for trunk?
> Matthew
>
> gcc/
> 2015-15-24 Matthew Wahab <matthew.wahab@arm.com>
>
> * config/arm/arm-arches.def: Add "armv6kz". Replace 6ZK with 6KZ
> and FL_FOR_ARCH6ZK with FL_FOR_ARCH6KZ.
> * config/arm/arm-c.c (arm_cpu_builtins): Emit "__ARM_ARCH_6ZK__"
> for armv6kz targets.
> * config/arm/arm-cores.def: Replace 6ZK with 6KZ.
> * config/arm/arm-protos.h (FL_ARCH6KZ): New.
> (FL_FOR_ARCH6ZK): Remove.
> (FL_FOR_ARCH6KZ): New.
> (arm_arch6zk): New declaration.
> * config/arm/arm-tables.opt: Regenerate.
> * config/arm/arm.c (arm_arch6kz): New.
> (arm_option_override): Set arm_arch6kz.
> * config/arm/arm.h (BASE_ARCH_6ZK): Rename to BASE_ARCH_6KZ.
> * config/arm/driver-arm.c: Add "armv6kz".
> * doc/invoke.texi: Replace "armv6zk" with "armv6kz" and
> "armv6zkt2" with "armv6kzt2".
>
[-- Attachment #2: archv6kz.patch --]
[-- Type: text/x-patch, Size: 7986 bytes --]
diff --git a/gcc/config/arm/arm-arches.def b/gcc/config/arm/arm-arches.def
index 840c1ff..3dafaa5 100644
--- a/gcc/config/arm/arm-arches.def
+++ b/gcc/config/arm/arm-arches.def
@@ -44,7 +44,8 @@ ARM_ARCH("armv6", arm1136js, 6, FL_CO_PROC | FL_FOR_ARCH6)
ARM_ARCH("armv6j", arm1136js, 6J, FL_CO_PROC | FL_FOR_ARCH6J)
ARM_ARCH("armv6k", mpcore, 6K, FL_CO_PROC | FL_FOR_ARCH6K)
ARM_ARCH("armv6z", arm1176jzs, 6Z, FL_CO_PROC | FL_FOR_ARCH6Z)
-ARM_ARCH("armv6zk", arm1176jzs, 6ZK, FL_CO_PROC | FL_FOR_ARCH6ZK)
+ARM_ARCH("armv6kz", arm1176jzs, 6KZ, FL_CO_PROC | FL_FOR_ARCH6KZ)
+ARM_ARCH("armv6zk", arm1176jzs, 6KZ, FL_CO_PROC | FL_FOR_ARCH6KZ)
ARM_ARCH("armv6t2", arm1156t2s, 6T2, FL_CO_PROC | FL_FOR_ARCH6T2)
ARM_ARCH("armv6-m", cortexm1, 6M, FL_FOR_ARCH6M)
ARM_ARCH("armv6s-m", cortexm1, 6M, FL_FOR_ARCH6M)
diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 297995b..9bf3973 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -167,6 +167,11 @@ arm_cpu_builtins (struct cpp_reader* pfile, int flags)
}
if (arm_arch_iwmmxt2)
builtin_define ("__IWMMXT2__");
+ /* ARMv6KZ was originally identified as the misspelled __ARM_ARCH_6ZK__. To
+ preserve the existing behaviour, the misspelled feature macro must still be
+ defined. */
+ if (arm_arch6kz)
+ builtin_define ("__ARM_ARCH_6ZK__");
if (TARGET_AAPCS_BASED)
{
if (arm_pcs_default == ARM_PCS_AAPCS_VFP)
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index 103c314..9d47fcf 100644
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -125,8 +125,8 @@ ARM_CORE("arm1026ej-s", arm1026ejs, arm1026ejs, 5TEJ, FL_LDSCHED, 9e)
/* V6 Architecture Processors */
ARM_CORE("arm1136j-s", arm1136js, arm1136js, 6J, FL_LDSCHED, 9e)
ARM_CORE("arm1136jf-s", arm1136jfs, arm1136jfs, 6J, FL_LDSCHED | FL_VFPV2, 9e)
-ARM_CORE("arm1176jz-s", arm1176jzs, arm1176jzs, 6ZK, FL_LDSCHED, 9e)
-ARM_CORE("arm1176jzf-s", arm1176jzfs, arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e)
+ARM_CORE("arm1176jz-s", arm1176jzs, arm1176jzs, 6KZ, FL_LDSCHED, 9e)
+ARM_CORE("arm1176jzf-s", arm1176jzfs, arm1176jzfs, 6KZ, FL_LDSCHED | FL_VFPV2, 9e)
ARM_CORE("mpcorenovfp", mpcorenovfp, mpcorenovfp, 6K, FL_LDSCHED, 9e)
ARM_CORE("mpcore", mpcore, mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e)
ARM_CORE("arm1156t2-s", arm1156t2s, arm1156t2s, 6T2, FL_LDSCHED, v6t2)
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 62f91ef..7aae934 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -382,6 +382,7 @@ extern bool arm_is_constant_pool_ref (rtx);
#define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */
#define FL_IWMMXT2 (1 << 30) /* "Intel Wireless MMX2 technology". */
+#define FL_ARCH6KZ (1 << 31) /* ARMv6KZ architecture. */
/* Flags that only effect tuning, not available instructions. */
#define FL_TUNE (FL_WBUF | FL_VFPV2 | FL_STRONG | FL_LDSCHED \
@@ -401,7 +402,7 @@ extern bool arm_is_constant_pool_ref (rtx);
#define FL_FOR_ARCH6J FL_FOR_ARCH6
#define FL_FOR_ARCH6K (FL_FOR_ARCH6 | FL_ARCH6K)
#define FL_FOR_ARCH6Z FL_FOR_ARCH6
-#define FL_FOR_ARCH6ZK FL_FOR_ARCH6K
+#define FL_FOR_ARCH6KZ (FL_FOR_ARCH6K | FL_ARCH6KZ)
#define FL_FOR_ARCH6T2 (FL_FOR_ARCH6 | FL_THUMB2)
#define FL_FOR_ARCH6M (FL_FOR_ARCH6 & ~FL_NOTM)
#define FL_FOR_ARCH7 ((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7)
@@ -441,6 +442,9 @@ extern int arm_arch6;
/* Nonzero if this chip supports the ARM 6K extensions. */
extern int arm_arch6k;
+/* Nonzero if this chip supports the ARM 6KZ extensions. */
+extern int arm_arch6kz;
+
/* Nonzero if instructions present in ARMv6-M can be used. */
extern int arm_arch6m;
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index 510e745..77e44aa 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -371,46 +371,49 @@ EnumValue
Enum(arm_arch) String(armv6z) Value(13)
EnumValue
-Enum(arm_arch) String(armv6zk) Value(14)
+Enum(arm_arch) String(armv6kz) Value(14)
EnumValue
-Enum(arm_arch) String(armv6t2) Value(15)
+Enum(arm_arch) String(armv6zk) Value(15)
EnumValue
-Enum(arm_arch) String(armv6-m) Value(16)
+Enum(arm_arch) String(armv6t2) Value(16)
EnumValue
-Enum(arm_arch) String(armv6s-m) Value(17)
+Enum(arm_arch) String(armv6-m) Value(17)
EnumValue
-Enum(arm_arch) String(armv7) Value(18)
+Enum(arm_arch) String(armv6s-m) Value(18)
EnumValue
-Enum(arm_arch) String(armv7-a) Value(19)
+Enum(arm_arch) String(armv7) Value(19)
EnumValue
-Enum(arm_arch) String(armv7ve) Value(20)
+Enum(arm_arch) String(armv7-a) Value(20)
EnumValue
-Enum(arm_arch) String(armv7-r) Value(21)
+Enum(arm_arch) String(armv7ve) Value(21)
EnumValue
-Enum(arm_arch) String(armv7-m) Value(22)
+Enum(arm_arch) String(armv7-r) Value(22)
EnumValue
-Enum(arm_arch) String(armv7e-m) Value(23)
+Enum(arm_arch) String(armv7-m) Value(23)
EnumValue
-Enum(arm_arch) String(armv8-a) Value(24)
+Enum(arm_arch) String(armv7e-m) Value(24)
EnumValue
-Enum(arm_arch) String(armv8-a+crc) Value(25)
+Enum(arm_arch) String(armv8-a) Value(25)
EnumValue
-Enum(arm_arch) String(iwmmxt) Value(26)
+Enum(arm_arch) String(armv8-a+crc) Value(26)
EnumValue
-Enum(arm_arch) String(iwmmxt2) Value(27)
+Enum(arm_arch) String(iwmmxt) Value(27)
+
+EnumValue
+Enum(arm_arch) String(iwmmxt2) Value(28)
Enum
Name(arm_fpu) Type(int)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index e1bc727..ae18276 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -801,6 +801,9 @@ int arm_arch6 = 0;
/* Nonzero if this chip supports the ARM 6K extensions. */
int arm_arch6k = 0;
+/* Nonzero if this chip supports the ARM 6KZ extensions. */
+int arm_arch6kz = 0;
+
/* Nonzero if instructions present in ARMv6-M can be used. */
int arm_arch6m = 0;
@@ -3043,6 +3046,7 @@ arm_option_override (void)
arm_arch5e = (insn_flags & FL_ARCH5E) != 0;
arm_arch6 = (insn_flags & FL_ARCH6) != 0;
arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
+ arm_arch6kz = arm_arch6k && (insn_flags & FL_ARCH6KZ);
arm_arch_notm = (insn_flags & FL_NOTM) != 0;
arm_arch6m = arm_arch6 && !arm_arch_notm;
arm_arch7 = (insn_flags & FL_ARCH7) != 0;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 836e517..bb64be0 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -374,7 +374,7 @@ enum base_architecture
BASE_ARCH_5TEJ = 5,
BASE_ARCH_6 = 6,
BASE_ARCH_6J = 6,
- BASE_ARCH_6ZK = 6,
+ BASE_ARCH_6KZ = 6,
BASE_ARCH_6K = 6,
BASE_ARCH_6T2 = 6,
BASE_ARCH_6M = 6,
diff --git a/gcc/config/arm/driver-arm.c b/gcc/config/arm/driver-arm.c
index c715bb7..7873606 100644
--- a/gcc/config/arm/driver-arm.c
+++ b/gcc/config/arm/driver-arm.c
@@ -35,6 +35,7 @@ static struct vendor_cpu arm_cpu_table[] = {
{"0xb02", "armv6k", "mpcore"},
{"0xb36", "armv6j", "arm1136j-s"},
{"0xb56", "armv6t2", "arm1156t2-s"},
+ {"0xb76", "armv6kz", "arm1176jz-s"},
{"0xb76", "armv6zk", "arm1176jz-s"},
{"0xc05", "armv7-a", "cortex-a5"},
{"0xc07", "armv7ve", "cortex-a7"},
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 55c2659..eb4dbe7 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -13304,7 +13304,7 @@ of the @option{-mcpu=} option. Permissible names are: @samp{armv2},
@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
@samp{armv5}, @samp{armv5t}, @samp{armv5e}, @samp{armv5te},
@samp{armv6}, @samp{armv6j},
-@samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, @samp{armv6-m},
+@samp{armv6t2}, @samp{armv6z}, @samp{armv6kz}, @samp{armv6-m},
@samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, @samp{armv7e-m},
@samp{armv7ve}, @samp{armv8-a}, @samp{armv8-a+crc},
@samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [ARM] Correct spelling of references to ARMv6KZ
2015-07-23 10:59 ` Matthew Wahab
@ 2015-07-23 11:16 ` Kyrill Tkachov
2015-07-27 9:53 ` Matthew Wahab
0 siblings, 1 reply; 5+ messages in thread
From: Kyrill Tkachov @ 2015-07-23 11:16 UTC (permalink / raw)
To: Matthew Wahab, gcc-patches
Hi Matthew,
On 23/07/15 11:54, Matthew Wahab wrote:
> On 24/06/15 10:25, Matthew Wahab wrote:
>
> Ping. Attached updated patch which also actually removes "armv6zk" from
> doc/invoke.texi.
>
> Also, retested:
> - arm-none-linux-gnueabihf native bootstrap and cross-compiled make checck.
> - arm-none-eabi: cross-compiled make check.
>
>
> gcc/
> 2015-07-23 Matthew Wahab <matthew.wahab@arm.com>
>
> * config/arm/arm-arches.def: Add "armv6kz". Replace 6ZK with 6KZ
> and FL_FOR_ARCH6ZK with FL_FOR_ARCH6KZ.
> * config/arm/arm-c.c (arm_cpu_builtins): Emit "__ARM_ARCH_6ZK__"
> for armv6kz targets.
> * config/arm/arm-cores.def: Replace 6ZK with 6KZ.
> * config/arm/arm-protos.h (FL_ARCH6KZ): New.
> (FL_FOR_ARCH6ZK): Remove.
> (FL_FOR_ARCH6KZ): New.
> (arm_arch6zk): New declaration.
> * config/arm/arm-tables.opt: Regenerate.
> * config/arm/arm.c (arm_arch6kz): New.
> (arm_option_override): Set arm_arch6kz.
> * config/arm/arm.h (BASE_ARCH_6ZK): Rename to BASE_ARCH_6KZ.
> * config/arm/driver-arm.c: Add "armv6kz".
> * doc/invoke.texi: Replace "armv6zk" with "armv6kz".
>
>
>> Hello,
>>
>> GCC supports ARM architecture ARMv6KZ but refers to it as ARMv6ZK. This is made
>> visible by the command line option -march=armv6zk and by the predefined macro
>> __ARM_ARCH_6ZK__.
>>
>> This patch corrects the spelling internally and adds -march=armv6kz. To preserve
>> existing behaviour, -march=armv6zk is kept as an alias of -march=armv6kz and
>> both __ARM_ARCH_6KZ__ and __ARM_ARCH_6ZK__ macros are defined for the
>> architecture.
>>
>> Use of -march=arm6kz will need to wait for binutils to be updated, a patch has
>> been submitted (https://sourceware.org/ml/binutils/2015-06/msg00236.html). Use
>> of the existing spelling, -march=arm6zk, still works with current binutils.
>>
>> Tested arm-none-linux-gnueabihf with check-gcc.
>>
>> Ok for trunk?
>> Matthew
>>
>> gcc/
>> 2015-15-24 Matthew Wahab <matthew.wahab@arm.com>
>>
>> * config/arm/arm-arches.def: Add "armv6kz". Replace 6ZK with 6KZ
>> and FL_FOR_ARCH6ZK with FL_FOR_ARCH6KZ.
>> * config/arm/arm-c.c (arm_cpu_builtins): Emit "__ARM_ARCH_6ZK__"
>> for armv6kz targets.
>> * config/arm/arm-cores.def: Replace 6ZK with 6KZ.
>> * config/arm/arm-protos.h (FL_ARCH6KZ): New.
>> (FL_FOR_ARCH6ZK): Remove.
>> (FL_FOR_ARCH6KZ): New.
>> (arm_arch6zk): New declaration.
>> * config/arm/arm-tables.opt: Regenerate.
>> * config/arm/arm.c (arm_arch6kz): New.
>> (arm_option_override): Set arm_arch6kz.
>> * config/arm/arm.h (BASE_ARCH_6ZK): Rename to BASE_ARCH_6KZ.
>> * config/arm/driver-arm.c: Add "armv6kz".
>> * doc/invoke.texi: Replace "armv6zk" with "armv6kz" and
>> "armv6zkt2" with "armv6kzt2".
>>
diff --git a/gcc/config/arm/driver-arm.c b/gcc/config/arm/driver-arm.c
index c715bb7..7873606 100644
--- a/gcc/config/arm/driver-arm.c
+++ b/gcc/config/arm/driver-arm.c
@@ -35,6 +35,7 @@ static struct vendor_cpu arm_cpu_table[] = {
{"0xb02", "armv6k", "mpcore"},
{"0xb36", "armv6j", "arm1136j-s"},
{"0xb56", "armv6t2", "arm1156t2-s"},
+ {"0xb76", "armv6kz", "arm1176jz-s"},
{"0xb76", "armv6zk", "arm1176jz-s"},
{"0xc05", "armv7-a", "cortex-a5"},
{"0xc07", "armv7ve", "cortex-a7"},
This table is scanned from beginning to end, checking for the first field.
You introduce a duplicate here, so the second form will never be reached.
I'd suggest removing the wrong spelling from here, but the re-written march string
will be passed to the assembler, so if the assembler is old and doesn't support the
correct spelling we'll get errors. So it seems like in order to preserve backwards
compatibility we don't want to put the correctly spelled entry here :(
But definitely add a comment here mentioning the deliberate oversight.
Kyrill
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [ARM] Correct spelling of references to ARMv6KZ
2015-07-23 11:16 ` Kyrill Tkachov
@ 2015-07-27 9:53 ` Matthew Wahab
2015-07-27 11:13 ` Kyrill Tkachov
0 siblings, 1 reply; 5+ messages in thread
From: Matthew Wahab @ 2015-07-27 9:53 UTC (permalink / raw)
To: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 2644 bytes --]
On 23/07/15 12:04, Kyrill Tkachov wrote:
>>
>>> GCC supports ARM architecture ARMv6KZ but refers to it as ARMv6ZK. This is made
>>> visible by the command line option -march=armv6zk and by the predefined macro
>>> __ARM_ARCH_6ZK__.
>>>
>>> This patch corrects the spelling internally and adds -march=armv6kz. To preserve
>>> existing behaviour, -march=armv6zk is kept as an alias of -march=armv6kz and
>>> both __ARM_ARCH_6KZ__ and __ARM_ARCH_6ZK__ macros are defined for the
>>> architecture.
>>>
>>> Use of -march=arm6kz will need to wait for binutils to be updated,[..]
>
> diff --git a/gcc/config/arm/driver-arm.c b/gcc/config/arm/driver-arm.c
> index c715bb7..7873606 100644
> --- a/gcc/config/arm/driver-arm.c
> +++ b/gcc/config/arm/driver-arm.c
> @@ -35,6 +35,7 @@ static struct vendor_cpu arm_cpu_table[] = {
> {"0xb02", "armv6k", "mpcore"},
> {"0xb36", "armv6j", "arm1136j-s"},
> {"0xb56", "armv6t2", "arm1156t2-s"},
> + {"0xb76", "armv6kz", "arm1176jz-s"},
> {"0xb76", "armv6zk", "arm1176jz-s"},
> {"0xc05", "armv7-a", "cortex-a5"},
> {"0xc07", "armv7ve", "cortex-a7"},
>
> This table is scanned from beginning to end, checking for the first field.
> You introduce a duplicate here, so the second form will never be reached.
> I'd suggest removing the wrong spelling from here, but the re-written march string
> will be passed to the assembler, so if the assembler is old and doesn't support the
> correct spelling we'll get errors. So it seems like in order to preserve backwards
> compatibility we don't want to put the correctly spelled entry here :(
> But definitely add a comment here mentioning the deliberate oversight.
>
Respun patch attached. I've removed "armv6kz" entry from config/arm/driver-arm.c and
replaced it with a comment for the "armv6zk" entry.
Tested for arm-none-linux-gnueabihf with native bootstrap and make check.
Matthew
gcc/
2015-07-27 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-arches.def: Add "armv6kz". Replace 6ZK with 6KZ
and FL_FOR_ARCH6ZK with FL_FOR_ARCH6KZ.
* config/arm/arm-c.c (arm_cpu_builtins): Emit "__ARM_ARCH_6ZK__"
for armv6kz targets.
* config/arm/arm-cores.def: Replace 6ZK with 6KZ.
* config/arm/arm-protos.h (FL_ARCH6KZ): New.
(FL_FOR_ARCH6ZK): Remove.
(FL_FOR_ARCH6KZ): New.
(arm_arch6zk): New declaration.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm.c (arm_arch6kz): New.
(arm_option_override): Set arm_arch6kz.
* config/arm/arm.h (BASE_ARCH_6ZK): Rename to BASE_ARCH_6KZ.
* config/arm/driver-arm.c: Add comment to "armv6zk" entry.
* doc/invoke.texi: Replace "armv6zk" with "armv6kz".
[-- Attachment #2: archv6kz_v2.patch --]
[-- Type: text/x-patch, Size: 8167 bytes --]
diff --git a/gcc/config/arm/arm-arches.def b/gcc/config/arm/arm-arches.def
index 840c1ff..3dafaa5 100644
--- a/gcc/config/arm/arm-arches.def
+++ b/gcc/config/arm/arm-arches.def
@@ -44,7 +44,8 @@ ARM_ARCH("armv6", arm1136js, 6, FL_CO_PROC | FL_FOR_ARCH6)
ARM_ARCH("armv6j", arm1136js, 6J, FL_CO_PROC | FL_FOR_ARCH6J)
ARM_ARCH("armv6k", mpcore, 6K, FL_CO_PROC | FL_FOR_ARCH6K)
ARM_ARCH("armv6z", arm1176jzs, 6Z, FL_CO_PROC | FL_FOR_ARCH6Z)
-ARM_ARCH("armv6zk", arm1176jzs, 6ZK, FL_CO_PROC | FL_FOR_ARCH6ZK)
+ARM_ARCH("armv6kz", arm1176jzs, 6KZ, FL_CO_PROC | FL_FOR_ARCH6KZ)
+ARM_ARCH("armv6zk", arm1176jzs, 6KZ, FL_CO_PROC | FL_FOR_ARCH6KZ)
ARM_ARCH("armv6t2", arm1156t2s, 6T2, FL_CO_PROC | FL_FOR_ARCH6T2)
ARM_ARCH("armv6-m", cortexm1, 6M, FL_FOR_ARCH6M)
ARM_ARCH("armv6s-m", cortexm1, 6M, FL_FOR_ARCH6M)
diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 297995b..9bf3973 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -167,6 +167,11 @@ arm_cpu_builtins (struct cpp_reader* pfile, int flags)
}
if (arm_arch_iwmmxt2)
builtin_define ("__IWMMXT2__");
+ /* ARMv6KZ was originally identified as the misspelled __ARM_ARCH_6ZK__. To
+ preserve the existing behaviour, the misspelled feature macro must still be
+ defined. */
+ if (arm_arch6kz)
+ builtin_define ("__ARM_ARCH_6ZK__");
if (TARGET_AAPCS_BASED)
{
if (arm_pcs_default == ARM_PCS_AAPCS_VFP)
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index 103c314..9d47fcf 100644
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -125,8 +125,8 @@ ARM_CORE("arm1026ej-s", arm1026ejs, arm1026ejs, 5TEJ, FL_LDSCHED, 9e)
/* V6 Architecture Processors */
ARM_CORE("arm1136j-s", arm1136js, arm1136js, 6J, FL_LDSCHED, 9e)
ARM_CORE("arm1136jf-s", arm1136jfs, arm1136jfs, 6J, FL_LDSCHED | FL_VFPV2, 9e)
-ARM_CORE("arm1176jz-s", arm1176jzs, arm1176jzs, 6ZK, FL_LDSCHED, 9e)
-ARM_CORE("arm1176jzf-s", arm1176jzfs, arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e)
+ARM_CORE("arm1176jz-s", arm1176jzs, arm1176jzs, 6KZ, FL_LDSCHED, 9e)
+ARM_CORE("arm1176jzf-s", arm1176jzfs, arm1176jzfs, 6KZ, FL_LDSCHED | FL_VFPV2, 9e)
ARM_CORE("mpcorenovfp", mpcorenovfp, mpcorenovfp, 6K, FL_LDSCHED, 9e)
ARM_CORE("mpcore", mpcore, mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e)
ARM_CORE("arm1156t2-s", arm1156t2s, arm1156t2s, 6T2, FL_LDSCHED, v6t2)
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 62f91ef..7aae934 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -382,6 +382,7 @@ extern bool arm_is_constant_pool_ref (rtx);
#define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */
#define FL_IWMMXT2 (1 << 30) /* "Intel Wireless MMX2 technology". */
+#define FL_ARCH6KZ (1 << 31) /* ARMv6KZ architecture. */
/* Flags that only effect tuning, not available instructions. */
#define FL_TUNE (FL_WBUF | FL_VFPV2 | FL_STRONG | FL_LDSCHED \
@@ -401,7 +402,7 @@ extern bool arm_is_constant_pool_ref (rtx);
#define FL_FOR_ARCH6J FL_FOR_ARCH6
#define FL_FOR_ARCH6K (FL_FOR_ARCH6 | FL_ARCH6K)
#define FL_FOR_ARCH6Z FL_FOR_ARCH6
-#define FL_FOR_ARCH6ZK FL_FOR_ARCH6K
+#define FL_FOR_ARCH6KZ (FL_FOR_ARCH6K | FL_ARCH6KZ)
#define FL_FOR_ARCH6T2 (FL_FOR_ARCH6 | FL_THUMB2)
#define FL_FOR_ARCH6M (FL_FOR_ARCH6 & ~FL_NOTM)
#define FL_FOR_ARCH7 ((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7)
@@ -441,6 +442,9 @@ extern int arm_arch6;
/* Nonzero if this chip supports the ARM 6K extensions. */
extern int arm_arch6k;
+/* Nonzero if this chip supports the ARM 6KZ extensions. */
+extern int arm_arch6kz;
+
/* Nonzero if instructions present in ARMv6-M can be used. */
extern int arm_arch6m;
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index 510e745..77e44aa 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -371,46 +371,49 @@ EnumValue
Enum(arm_arch) String(armv6z) Value(13)
EnumValue
-Enum(arm_arch) String(armv6zk) Value(14)
+Enum(arm_arch) String(armv6kz) Value(14)
EnumValue
-Enum(arm_arch) String(armv6t2) Value(15)
+Enum(arm_arch) String(armv6zk) Value(15)
EnumValue
-Enum(arm_arch) String(armv6-m) Value(16)
+Enum(arm_arch) String(armv6t2) Value(16)
EnumValue
-Enum(arm_arch) String(armv6s-m) Value(17)
+Enum(arm_arch) String(armv6-m) Value(17)
EnumValue
-Enum(arm_arch) String(armv7) Value(18)
+Enum(arm_arch) String(armv6s-m) Value(18)
EnumValue
-Enum(arm_arch) String(armv7-a) Value(19)
+Enum(arm_arch) String(armv7) Value(19)
EnumValue
-Enum(arm_arch) String(armv7ve) Value(20)
+Enum(arm_arch) String(armv7-a) Value(20)
EnumValue
-Enum(arm_arch) String(armv7-r) Value(21)
+Enum(arm_arch) String(armv7ve) Value(21)
EnumValue
-Enum(arm_arch) String(armv7-m) Value(22)
+Enum(arm_arch) String(armv7-r) Value(22)
EnumValue
-Enum(arm_arch) String(armv7e-m) Value(23)
+Enum(arm_arch) String(armv7-m) Value(23)
EnumValue
-Enum(arm_arch) String(armv8-a) Value(24)
+Enum(arm_arch) String(armv7e-m) Value(24)
EnumValue
-Enum(arm_arch) String(armv8-a+crc) Value(25)
+Enum(arm_arch) String(armv8-a) Value(25)
EnumValue
-Enum(arm_arch) String(iwmmxt) Value(26)
+Enum(arm_arch) String(armv8-a+crc) Value(26)
EnumValue
-Enum(arm_arch) String(iwmmxt2) Value(27)
+Enum(arm_arch) String(iwmmxt) Value(27)
+
+EnumValue
+Enum(arm_arch) String(iwmmxt2) Value(28)
Enum
Name(arm_fpu) Type(int)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index e1bc727..ae18276 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -801,6 +801,9 @@ int arm_arch6 = 0;
/* Nonzero if this chip supports the ARM 6K extensions. */
int arm_arch6k = 0;
+/* Nonzero if this chip supports the ARM 6KZ extensions. */
+int arm_arch6kz = 0;
+
/* Nonzero if instructions present in ARMv6-M can be used. */
int arm_arch6m = 0;
@@ -3043,6 +3046,7 @@ arm_option_override (void)
arm_arch5e = (insn_flags & FL_ARCH5E) != 0;
arm_arch6 = (insn_flags & FL_ARCH6) != 0;
arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
+ arm_arch6kz = arm_arch6k && (insn_flags & FL_ARCH6KZ);
arm_arch_notm = (insn_flags & FL_NOTM) != 0;
arm_arch6m = arm_arch6 && !arm_arch_notm;
arm_arch7 = (insn_flags & FL_ARCH7) != 0;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 836e517..bb64be0 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -374,7 +374,7 @@ enum base_architecture
BASE_ARCH_5TEJ = 5,
BASE_ARCH_6 = 6,
BASE_ARCH_6J = 6,
- BASE_ARCH_6ZK = 6,
+ BASE_ARCH_6KZ = 6,
BASE_ARCH_6K = 6,
BASE_ARCH_6T2 = 6,
BASE_ARCH_6M = 6,
diff --git a/gcc/config/arm/driver-arm.c b/gcc/config/arm/driver-arm.c
index c715bb7..9d24a3f 100644
--- a/gcc/config/arm/driver-arm.c
+++ b/gcc/config/arm/driver-arm.c
@@ -35,6 +35,9 @@ static struct vendor_cpu arm_cpu_table[] = {
{"0xb02", "armv6k", "mpcore"},
{"0xb36", "armv6j", "arm1136j-s"},
{"0xb56", "armv6t2", "arm1156t2-s"},
+ /* armv6kz is the correct spelling for ARMv6KZ but may not be supported in
+ the version of binutils used. The incorrect spelling is supported in
+ legacy and current binutils so that is used instead. */
{"0xb76", "armv6zk", "arm1176jz-s"},
{"0xc05", "armv7-a", "cortex-a5"},
{"0xc07", "armv7ve", "cortex-a7"},
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 55c2659..eb4dbe7 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -13304,7 +13304,7 @@ of the @option{-mcpu=} option. Permissible names are: @samp{armv2},
@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
@samp{armv5}, @samp{armv5t}, @samp{armv5e}, @samp{armv5te},
@samp{armv6}, @samp{armv6j},
-@samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, @samp{armv6-m},
+@samp{armv6t2}, @samp{armv6z}, @samp{armv6kz}, @samp{armv6-m},
@samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, @samp{armv7e-m},
@samp{armv7ve}, @samp{armv8-a}, @samp{armv8-a+crc},
@samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [ARM] Correct spelling of references to ARMv6KZ
2015-07-27 9:53 ` Matthew Wahab
@ 2015-07-27 11:13 ` Kyrill Tkachov
0 siblings, 0 replies; 5+ messages in thread
From: Kyrill Tkachov @ 2015-07-27 11:13 UTC (permalink / raw)
To: Matthew Wahab, gcc-patches
On 27/07/15 10:47, Matthew Wahab wrote:
> On 23/07/15 12:04, Kyrill Tkachov wrote:
>>>> GCC supports ARM architecture ARMv6KZ but refers to it as ARMv6ZK. This is made
>>>> visible by the command line option -march=armv6zk and by the predefined macro
>>>> __ARM_ARCH_6ZK__.
>>>>
>>>> This patch corrects the spelling internally and adds -march=armv6kz. To preserve
>>>> existing behaviour, -march=armv6zk is kept as an alias of -march=armv6kz and
>>>> both __ARM_ARCH_6KZ__ and __ARM_ARCH_6ZK__ macros are defined for the
>>>> architecture.
>>>>
>>>> Use of -march=arm6kz will need to wait for binutils to be updated,[..]
>> diff --git a/gcc/config/arm/driver-arm.c b/gcc/config/arm/driver-arm.c
>> index c715bb7..7873606 100644
>> --- a/gcc/config/arm/driver-arm.c
>> +++ b/gcc/config/arm/driver-arm.c
>> @@ -35,6 +35,7 @@ static struct vendor_cpu arm_cpu_table[] = {
>> {"0xb02", "armv6k", "mpcore"},
>> {"0xb36", "armv6j", "arm1136j-s"},
>> {"0xb56", "armv6t2", "arm1156t2-s"},
>> + {"0xb76", "armv6kz", "arm1176jz-s"},
>> {"0xb76", "armv6zk", "arm1176jz-s"},
>> {"0xc05", "armv7-a", "cortex-a5"},
>> {"0xc07", "armv7ve", "cortex-a7"},
>>
>> This table is scanned from beginning to end, checking for the first field.
>> You introduce a duplicate here, so the second form will never be reached.
>> I'd suggest removing the wrong spelling from here, but the re-written march string
>> will be passed to the assembler, so if the assembler is old and doesn't support the
>> correct spelling we'll get errors. So it seems like in order to preserve backwards
>> compatibility we don't want to put the correctly spelled entry here :(
>> But definitely add a comment here mentioning the deliberate oversight.
>>
> Respun patch attached. I've removed "armv6kz" entry from config/arm/driver-arm.c and
> replaced it with a comment for the "armv6zk" entry.
>
> Tested for arm-none-linux-gnueabihf with native bootstrap and make check.
>
> Matthew
>
> gcc/
> 2015-07-27 Matthew Wahab <matthew.wahab@arm.com>
>
> * config/arm/arm-arches.def: Add "armv6kz". Replace 6ZK with 6KZ
> and FL_FOR_ARCH6ZK with FL_FOR_ARCH6KZ.
> * config/arm/arm-c.c (arm_cpu_builtins): Emit "__ARM_ARCH_6ZK__"
> for armv6kz targets.
> * config/arm/arm-cores.def: Replace 6ZK with 6KZ.
> * config/arm/arm-protos.h (FL_ARCH6KZ): New.
> (FL_FOR_ARCH6ZK): Remove.
> (FL_FOR_ARCH6KZ): New.
> (arm_arch6zk): New declaration.
> * config/arm/arm-tables.opt: Regenerate.
> * config/arm/arm.c (arm_arch6kz): New.
> (arm_option_override): Set arm_arch6kz.
> * config/arm/arm.h (BASE_ARCH_6ZK): Rename to BASE_ARCH_6KZ.
> * config/arm/driver-arm.c: Add comment to "armv6zk" entry.
> * doc/invoke.texi: Replace "armv6zk" with "armv6kz".
This is ok for trunk.
Thanks,
Kyrill
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2015-07-27 10:44 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2015-06-24 9:54 [ARM] Correct spelling of references to ARMv6KZ Matthew Wahab
2015-07-23 10:59 ` Matthew Wahab
2015-07-23 11:16 ` Kyrill Tkachov
2015-07-27 9:53 ` Matthew Wahab
2015-07-27 11:13 ` Kyrill Tkachov
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