* [PATCH 1/2][ARM] Record FPU features as a bit-set
@ 2015-06-22 15:17 Matthew Wahab
2015-06-22 15:18 ` [PATCH 2/2][ARM] Use new FPU features representation Matthew Wahab
2015-08-10 10:28 ` [PATCH 1/2][ARM] Record FPU features as a bit-set Matthew Wahab
0 siblings, 2 replies; 7+ messages in thread
From: Matthew Wahab @ 2015-06-22 15:17 UTC (permalink / raw)
To: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 750 bytes --]
Hello,
The ARM backend records FPU features as booleans, one for each feature. This
means that adding support for a new feature involves updating every entry in the
list of FPU descriptions in arm-fpus.def. This patch series changes the
representation of FPU features to use a simple bit-set and flags, as is done
elsewhere.
This patch adds the new FPU feature representation, with feature sets
represented as unsigned longs.
Tested the series for arm-none-linux-gnueabihf with check-gcc
Ok for trunk?
Matthew
gcc/
2015-06-22 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm.h (arm_fpu_fset): New.
(ARM_FPU_FSET_HAS): New.
(FPU_FL_NONE): New.
(FPU_FL_NEON): New.
(FPU_FL_FP16): New.
(FPU_FL_CRYPTO): New.
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0001-Add-fpu-feature-set-definitions.patch --]
[-- Type: text/x-patch; name=0001-Add-fpu-feature-set-definitions.patch, Size: 1153 bytes --]
From 0ae697751afd9420ece15432e4892a60574b1d56 Mon Sep 17 00:00:00 2001
From: Matthew Wahab <matthew.wahab@arm.com>
Date: Wed, 10 Jun 2015 09:57:55 +0100
Subject: [PATCH 1/2] Add fpu feature set definitions.
Change-Id: I9614d12b19f068ae2e0cebc1a6c3903972c73d6a
---
gcc/config/arm/arm.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 373dc85..eadbcec 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -318,6 +318,19 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
{"mode", "%{!marm:%{!mthumb:-m%(VALUE)}}"}, \
{"tls", "%{!mtls-dialect=*:-mtls-dialect=%(VALUE)}"},
+/* FPU feature sets. */
+
+typedef unsigned long arm_fpu_fset;
+
+/* Test for an FPU feature. */
+#define ARM_FPU_FSET_HAS(S,F) (((S) & (F)) == F)
+
+/* FPU Features. */
+#define FPU_FL_NONE (0)
+#define FPU_FL_NEON (1 << 0) /* NEON instructions. */
+#define FPU_FL_FP16 (1 << 1) /* Half-precision. */
+#define FPU_FL_CRYPTO (1 << 2) /* Crypto extensions. */
+
/* Which floating point model to use. */
enum arm_fp_model
{
--
1.9.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/2][ARM] Use new FPU features representation
2015-06-22 15:17 [PATCH 1/2][ARM] Record FPU features as a bit-set Matthew Wahab
@ 2015-06-22 15:18 ` Matthew Wahab
2015-08-10 10:28 ` Matthew Wahab
2015-08-10 14:59 ` Ramana Radhakrishnan
2015-08-10 10:28 ` [PATCH 1/2][ARM] Record FPU features as a bit-set Matthew Wahab
1 sibling, 2 replies; 7+ messages in thread
From: Matthew Wahab @ 2015-06-22 15:18 UTC (permalink / raw)
To: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 737 bytes --]
Hello,
This patch series changes the representation of FPU features to use a simple
bit-set and flags, as is done elsewhere.
This patch uses the new representation of FPU feature sets.
Tested the series for arm-none-linux-gnueabihf with check-gcc
Ok for trunk?
Matthew
gcc/
2015-06-22 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-fpus.def: Replace neon, fp16 and crypto boolean
fields with feature flags. Update comment.
* config/arm/arm.c (ARM_FPU): Update macro.
* config/arm/arm.h (TARGET_NEON_FP16): Update feature test.
(TARGET_FP16): Likewise.
(TARGET_CRYPTO): Likewise.
(TARGET_NEON): Likewise.
(struct arm_fpu_desc): Remove fields neon, fp16 and crypto. Add
field features.
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: 0002-Use-new-FPU-feature-definitions.patch --]
[-- Type: text/x-patch; name=0002-Use-new-FPU-feature-definitions.patch, Size: 6639 bytes --]
From 6f9cd1b41d7597d95bd80aa21344f8e6e011e168 Mon Sep 17 00:00:00 2001
From: Matthew Wahab <matthew.wahab@arm.com>
Date: Wed, 10 Jun 2015 10:11:56 +0100
Subject: [PATCH 2/2] Use new FPU feature definitions.
Change-Id: I0c45e52b08b31433ec2b30fcb666584cabcb826b
---
gcc/config/arm/arm-fpus.def | 40 ++++++++++++++++++++--------------------
gcc/config/arm/arm.c | 4 ++--
gcc/config/arm/arm.h | 22 +++++++++++++---------
3 files changed, 35 insertions(+), 31 deletions(-)
diff --git a/gcc/config/arm/arm-fpus.def b/gcc/config/arm/arm-fpus.def
index 2dfefd6..efd5896 100644
--- a/gcc/config/arm/arm-fpus.def
+++ b/gcc/config/arm/arm-fpus.def
@@ -19,30 +19,30 @@
/* Before using #include to read this file, define a macro:
- ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO)
+ ARM_FPU(NAME, MODEL, REV, VFP_REGS, FEATURES)
The arguments are the fields of struct arm_fpu_desc.
genopt.sh assumes no whitespace up to the first "," in each entry. */
-ARM_FPU("vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, false, false, false)
-ARM_FPU("vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false, false)
-ARM_FPU("vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, true, false)
-ARM_FPU("vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, false, false)
-ARM_FPU("vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, true, false)
-ARM_FPU("vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, false, false)
-ARM_FPU("vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, true, false)
-ARM_FPU("neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true , false, false)
-ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true, true, false)
-ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, false, true, false)
-ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, false, true, false)
-ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, false, true, false)
-ARM_FPU("fpv5-sp-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_SINGLE, false, true, false)
-ARM_FPU("fpv5-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_D16, false, true, false)
-ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, true, true, false)
-ARM_FPU("fp-armv8", ARM_FP_MODEL_VFP, 8, VFP_REG_D32, false, true, false)
-ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, false)
+ARM_FPU("vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, FPU_FL_NONE)
+ARM_FPU("vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NONE)
+ARM_FPU("vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_FP16)
+ARM_FPU("vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, FPU_FL_NONE)
+ARM_FPU("vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, FPU_FL_FP16)
+ARM_FPU("vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, FPU_FL_NONE)
+ARM_FPU("vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, FPU_FL_FP16)
+ARM_FPU("neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NEON)
+ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
+ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, FPU_FL_FP16)
+ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, FPU_FL_FP16)
+ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, FPU_FL_FP16)
+ARM_FPU("fpv5-sp-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_SINGLE, FPU_FL_FP16)
+ARM_FPU("fpv5-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_D16, FPU_FL_FP16)
+ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
+ARM_FPU("fp-armv8", ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_FP16)
+ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
ARM_FPU("crypto-neon-fp-armv8",
- ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, true)
+ ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16 | FPU_FL_CRYPTO)
/* Compatibility aliases. */
-ARM_FPU("vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false, false)
+ARM_FPU("vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NONE)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index e79a369..e104d2f 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2231,8 +2231,8 @@ char arm_arch_name[] = "__ARM_ARCH_0UNK__";
static const struct arm_fpu_desc all_fpus[] =
{
-#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO) \
- { NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO },
+#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, FEATURES) \
+ { NAME, MODEL, REV, VFP_REGS, FEATURES },
#include "arm-fpus.def"
#undef ARM_FPU
};
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index eadbcec..26d48a7 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -193,11 +193,13 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
#define TARGET_VFP_DOUBLE (TARGET_VFP && arm_fpu_desc->regs != VFP_REG_SINGLE)
/* FPU supports half-precision floating-point with NEON element load/store. */
-#define TARGET_NEON_FP16 \
- (TARGET_VFP && arm_fpu_desc->neon && arm_fpu_desc->fp16)
+#define TARGET_NEON_FP16 \
+ (TARGET_VFP \
+ && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_NEON | FPU_FL_FP16))
/* FPU supports VFP half-precision floating-point. */
-#define TARGET_FP16 (TARGET_VFP && arm_fpu_desc->fp16)
+#define TARGET_FP16 \
+ (TARGET_VFP && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_FP16))
/* FPU supports fused-multiply-add operations. */
#define TARGET_FMA (TARGET_VFP && arm_fpu_desc->rev >= 4)
@@ -206,14 +208,18 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
#define TARGET_FPU_ARMV8 (TARGET_VFP && arm_fpu_desc->rev >= 8)
/* FPU supports Crypto extensions. */
-#define TARGET_CRYPTO (TARGET_VFP && arm_fpu_desc->crypto)
+#define TARGET_CRYPTO \
+ (TARGET_VFP && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_CRYPTO))
+
/* FPU supports Neon instructions. The setting of this macro gets
revealed via __ARM_NEON__ so we add extra guards upon TARGET_32BIT
and TARGET_HARD_FLOAT to ensure that NEON instructions are
available. */
-#define TARGET_NEON (TARGET_32BIT && TARGET_HARD_FLOAT \
- && TARGET_VFP && arm_fpu_desc->neon)
+#define TARGET_NEON \
+ (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP \
+ && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_NEON))
+
/* Q-bit is present. */
#define TARGET_ARM_QBIT_P(flags) \
@@ -353,9 +359,7 @@ extern const struct arm_fpu_desc
enum arm_fp_model model;
int rev;
enum vfp_reg_type regs;
- int neon;
- int fp16;
- int crypto;
+ arm_fpu_fset features;
} *arm_fpu_desc;
/* Which floating point hardware to schedule for. */
--
1.9.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2][ARM] Record FPU features as a bit-set
2015-06-22 15:17 [PATCH 1/2][ARM] Record FPU features as a bit-set Matthew Wahab
2015-06-22 15:18 ` [PATCH 2/2][ARM] Use new FPU features representation Matthew Wahab
@ 2015-08-10 10:28 ` Matthew Wahab
2015-08-10 10:55 ` Kyrill Tkachov
2015-08-10 14:57 ` Ramana Radhakrishnan
1 sibling, 2 replies; 7+ messages in thread
From: Matthew Wahab @ 2015-08-10 10:28 UTC (permalink / raw)
To: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 938 bytes --]
Ping. Updated patch attached.
Also, retested the series for arm-none-linux-gnueabihf with native bootstrap and make
check.
On 22/06/15 16:16, Matthew Wahab wrote:
> Hello,
>
> The ARM backend records FPU features as booleans, one for each feature. This
> means that adding support for a new feature involves updating every entry in the
> list of FPU descriptions in arm-fpus.def. This patch series changes the
> representation of FPU features to use a simple bit-set and flags, as is done
> elsewhere.
>
> This patch adds the new FPU feature representation, with feature sets
> represented as unsigned longs.
>
> Tested the series for arm-none-linux-gnueabihf with check-gcc
>
> Ok for trunk?
> Matthew
>
> gcc/
> 2015-06-22 Matthew Wahab <matthew.wahab@arm.com>
>
> * config/arm/arm.h (arm_fpu_fset): New.
> (ARM_FPU_FSET_HAS): New.
> (FPU_FL_NONE): New.
> (FPU_FL_NEON): New.
> (FPU_FL_FP16): New.
> (FPU_FL_CRYPTO): New.
>
[-- Attachment #2: 0001-Add-fpu-feature-set-definitions.patch --]
[-- Type: text/x-patch, Size: 1125 bytes --]
From 571416d9e7bc9cb6c16008486faf357873270991 Mon Sep 17 00:00:00 2001
From: Matthew Wahab <matthew.wahab@arm.com>
Date: Thu, 23 Jul 2015 12:44:51 +0100
Subject: [PATCH 1/2] Add fpu feature set definitions.
Change-Id: I9f0fcc9627e3c435cbbc9056b9244781b438447e
---
gcc/config/arm/arm.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index bb64be0..f49eb48 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -318,6 +318,19 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
{"mode", "%{!marm:%{!mthumb:-m%(VALUE)}}"}, \
{"tls", "%{!mtls-dialect=*:-mtls-dialect=%(VALUE)}"},
+/* FPU feature sets. */
+
+typedef unsigned long arm_fpu_feature_set;
+
+/* Test for an FPU feature. */
+#define ARM_FPU_FSET_HAS(S,F) (((S) & (F)) == (F))
+
+/* FPU Features. */
+#define FPU_FL_NONE (0)
+#define FPU_FL_NEON (1 << 0) /* NEON instructions. */
+#define FPU_FL_FP16 (1 << 1) /* Half-precision. */
+#define FPU_FL_CRYPTO (1 << 2) /* Crypto extensions. */
+
/* Which floating point model to use. */
enum arm_fp_model
{
--
1.9.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2][ARM] Use new FPU features representation
2015-06-22 15:18 ` [PATCH 2/2][ARM] Use new FPU features representation Matthew Wahab
@ 2015-08-10 10:28 ` Matthew Wahab
2015-08-10 14:59 ` Ramana Radhakrishnan
1 sibling, 0 replies; 7+ messages in thread
From: Matthew Wahab @ 2015-08-10 10:28 UTC (permalink / raw)
To: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 923 bytes --]
Ping. Updated patch attached.
Also, retested the series for arm-none-linux-gnueabihf with native bootstrap and make
check.
On 22/06/15 16:18, Matthew Wahab wrote:
> Hello,
>
> This patch series changes the representation of FPU features to use a simple
> bit-set and flags, as is done elsewhere.
>
> This patch uses the new representation of FPU feature sets.
>
> Tested the series for arm-none-linux-gnueabihf with check-gcc
>
> Ok for trunk?
> Matthew
>
> gcc/
> 2015-06-22 Matthew Wahab <matthew.wahab@arm.com>
>
> * config/arm/arm-fpus.def: Replace neon, fp16 and crypto boolean
> fields with feature flags. Update comment.
> * config/arm/arm.c (ARM_FPU): Update macro.
> * config/arm/arm.h (TARGET_NEON_FP16): Update feature test.
> (TARGET_FP16): Likewise.
> (TARGET_CRYPTO): Likewise.
> (TARGET_NEON): Likewise.
> (struct arm_fpu_desc): Remove fields neon, fp16 and crypto. Add
> field features.
>
[-- Attachment #2: 0002-Use-new-FPU-feature-definitions.patch --]
[-- Type: text/x-patch, Size: 6507 bytes --]
From 73e14e3f8ebde714735326a8745c929ac92759e8 Mon Sep 17 00:00:00 2001
From: Matthew Wahab <matthew.wahab@arm.com>
Date: Thu, 23 Jul 2015 12:45:48 +0100
Subject: [PATCH 2/2] Use new FPU feature definitions.
Change-Id: Ic9e156efb7512455130260e115e9af8f27cda3a5
---
gcc/config/arm/arm-fpus.def | 40 ++++++++++++++++++++--------------------
gcc/config/arm/arm.c | 4 ++--
gcc/config/arm/arm.h | 22 +++++++++++++---------
3 files changed, 35 insertions(+), 31 deletions(-)
diff --git a/gcc/config/arm/arm-fpus.def b/gcc/config/arm/arm-fpus.def
index 2dfefd6..efd5896 100644
--- a/gcc/config/arm/arm-fpus.def
+++ b/gcc/config/arm/arm-fpus.def
@@ -19,30 +19,30 @@
/* Before using #include to read this file, define a macro:
- ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO)
+ ARM_FPU(NAME, MODEL, REV, VFP_REGS, FEATURES)
The arguments are the fields of struct arm_fpu_desc.
genopt.sh assumes no whitespace up to the first "," in each entry. */
-ARM_FPU("vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, false, false, false)
-ARM_FPU("vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false, false)
-ARM_FPU("vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, true, false)
-ARM_FPU("vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, false, false)
-ARM_FPU("vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, true, false)
-ARM_FPU("vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, false, false)
-ARM_FPU("vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, true, false)
-ARM_FPU("neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true , false, false)
-ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true, true, false)
-ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, false, true, false)
-ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, false, true, false)
-ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, false, true, false)
-ARM_FPU("fpv5-sp-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_SINGLE, false, true, false)
-ARM_FPU("fpv5-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_D16, false, true, false)
-ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, true, true, false)
-ARM_FPU("fp-armv8", ARM_FP_MODEL_VFP, 8, VFP_REG_D32, false, true, false)
-ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, false)
+ARM_FPU("vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, FPU_FL_NONE)
+ARM_FPU("vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NONE)
+ARM_FPU("vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_FP16)
+ARM_FPU("vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, FPU_FL_NONE)
+ARM_FPU("vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, FPU_FL_FP16)
+ARM_FPU("vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, FPU_FL_NONE)
+ARM_FPU("vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, FPU_FL_FP16)
+ARM_FPU("neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NEON)
+ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
+ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, FPU_FL_FP16)
+ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, FPU_FL_FP16)
+ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, FPU_FL_FP16)
+ARM_FPU("fpv5-sp-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_SINGLE, FPU_FL_FP16)
+ARM_FPU("fpv5-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_D16, FPU_FL_FP16)
+ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
+ARM_FPU("fp-armv8", ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_FP16)
+ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
ARM_FPU("crypto-neon-fp-armv8",
- ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, true)
+ ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16 | FPU_FL_CRYPTO)
/* Compatibility aliases. */
-ARM_FPU("vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false, false)
+ARM_FPU("vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NONE)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 1ea9e27..6e15bf2 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2230,8 +2230,8 @@ char arm_arch_name[] = "__ARM_ARCH_0UNK__";
static const struct arm_fpu_desc all_fpus[] =
{
-#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO) \
- { NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO },
+#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, FEATURES) \
+ { NAME, MODEL, REV, VFP_REGS, FEATURES },
#include "arm-fpus.def"
#undef ARM_FPU
};
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index f49eb48..eee9e8b 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -193,11 +193,13 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
#define TARGET_VFP_DOUBLE (TARGET_VFP && arm_fpu_desc->regs != VFP_REG_SINGLE)
/* FPU supports half-precision floating-point with NEON element load/store. */
-#define TARGET_NEON_FP16 \
- (TARGET_VFP && arm_fpu_desc->neon && arm_fpu_desc->fp16)
+#define TARGET_NEON_FP16 \
+ (TARGET_VFP \
+ && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_NEON | FPU_FL_FP16))
/* FPU supports VFP half-precision floating-point. */
-#define TARGET_FP16 (TARGET_VFP && arm_fpu_desc->fp16)
+#define TARGET_FP16 \
+ (TARGET_VFP && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_FP16))
/* FPU supports fused-multiply-add operations. */
#define TARGET_FMA (TARGET_VFP && arm_fpu_desc->rev >= 4)
@@ -206,14 +208,18 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
#define TARGET_FPU_ARMV8 (TARGET_VFP && arm_fpu_desc->rev >= 8)
/* FPU supports Crypto extensions. */
-#define TARGET_CRYPTO (TARGET_VFP && arm_fpu_desc->crypto)
+#define TARGET_CRYPTO \
+ (TARGET_VFP && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_CRYPTO))
+
/* FPU supports Neon instructions. The setting of this macro gets
revealed via __ARM_NEON__ so we add extra guards upon TARGET_32BIT
and TARGET_HARD_FLOAT to ensure that NEON instructions are
available. */
-#define TARGET_NEON (TARGET_32BIT && TARGET_HARD_FLOAT \
- && TARGET_VFP && arm_fpu_desc->neon)
+#define TARGET_NEON \
+ (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP \
+ && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_NEON))
+
/* Q-bit is present. */
#define TARGET_ARM_QBIT_P(flags) \
@@ -353,9 +359,7 @@ extern const struct arm_fpu_desc
enum arm_fp_model model;
int rev;
enum vfp_reg_type regs;
- int neon;
- int fp16;
- int crypto;
+ arm_fpu_feature_set features;
} *arm_fpu_desc;
/* Which floating point hardware to schedule for. */
--
1.9.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2][ARM] Record FPU features as a bit-set
2015-08-10 10:28 ` [PATCH 1/2][ARM] Record FPU features as a bit-set Matthew Wahab
@ 2015-08-10 10:55 ` Kyrill Tkachov
2015-08-10 14:57 ` Ramana Radhakrishnan
1 sibling, 0 replies; 7+ messages in thread
From: Kyrill Tkachov @ 2015-08-10 10:55 UTC (permalink / raw)
To: Matthew Wahab, gcc-patches
Hi Matthew,
On 10/08/15 11:28, Matthew Wahab wrote:
> Ping. Updated patch attached.
>
> Also, retested the series for arm-none-linux-gnueabihf with native bootstrap and make
> check.
>
> On 22/06/15 16:16, Matthew Wahab wrote:
>> Hello,
>>
>> The ARM backend records FPU features as booleans, one for each feature. This
>> means that adding support for a new feature involves updating every entry in the
>> list of FPU descriptions in arm-fpus.def. This patch series changes the
>> representation of FPU features to use a simple bit-set and flags, as is done
>> elsewhere.
>>
>> This patch adds the new FPU feature representation, with feature sets
>> represented as unsigned longs.
>>
>> Tested the series for arm-none-linux-gnueabihf with check-gcc
>>
>> Ok for trunk?
>> Matthew
>>
>> gcc/
>> 2015-06-22 Matthew Wahab <matthew.wahab@arm.com>
>>
>> * config/arm/arm.h (arm_fpu_fset): New.
>> (ARM_FPU_FSET_HAS): New.
>> (FPU_FL_NONE): New.
>> (FPU_FL_NEON): New.
>> (FPU_FL_FP16): New.
>> (FPU_FL_CRYPTO): New.
This is ok.
Thanks,
Kyrill
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2][ARM] Record FPU features as a bit-set
2015-08-10 10:28 ` [PATCH 1/2][ARM] Record FPU features as a bit-set Matthew Wahab
2015-08-10 10:55 ` Kyrill Tkachov
@ 2015-08-10 14:57 ` Ramana Radhakrishnan
1 sibling, 0 replies; 7+ messages in thread
From: Ramana Radhakrishnan @ 2015-08-10 14:57 UTC (permalink / raw)
To: Matthew Wahab; +Cc: gcc-patches
On Mon, Aug 10, 2015 at 11:28:06AM +0100, Matthew Wahab wrote:
> Ping. Updated patch attached.
>
> Also, retested the series for arm-none-linux-gnueabihf with native
> bootstrap and make check.
>
> On 22/06/15 16:16, Matthew Wahab wrote:
> >Hello,
> >
> >The ARM backend records FPU features as booleans, one for each feature. This
> >means that adding support for a new feature involves updating every entry in the
> >list of FPU descriptions in arm-fpus.def. This patch series changes the
> >representation of FPU features to use a simple bit-set and flags, as is done
> >elsewhere.
> >
> >This patch adds the new FPU feature representation, with feature sets
> >represented as unsigned longs.
> >
> >Tested the series for arm-none-linux-gnueabihf with check-gcc
> >
> >Ok for trunk?
> >Matthew
This is OK, thanks
Ramana
> >
> >gcc/
> >2015-06-22 Matthew Wahab <matthew.wahab@arm.com>
> >
> > * config/arm/arm.h (arm_fpu_fset): New.
> > (ARM_FPU_FSET_HAS): New.
> > (FPU_FL_NONE): New.
> > (FPU_FL_NEON): New.
> > (FPU_FL_FP16): New.
> > (FPU_FL_CRYPTO): New.
> >
>
> From 571416d9e7bc9cb6c16008486faf357873270991 Mon Sep 17 00:00:00 2001
> From: Matthew Wahab <matthew.wahab@arm.com>
> Date: Thu, 23 Jul 2015 12:44:51 +0100
> Subject: [PATCH 1/2] Add fpu feature set definitions.
>
> Change-Id: I9f0fcc9627e3c435cbbc9056b9244781b438447e
> ---
> gcc/config/arm/arm.h | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
> index bb64be0..f49eb48 100644
> --- a/gcc/config/arm/arm.h
> +++ b/gcc/config/arm/arm.h
> @@ -318,6 +318,19 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
> {"mode", "%{!marm:%{!mthumb:-m%(VALUE)}}"}, \
> {"tls", "%{!mtls-dialect=*:-mtls-dialect=%(VALUE)}"},
>
> +/* FPU feature sets. */
> +
> +typedef unsigned long arm_fpu_feature_set;
> +
> +/* Test for an FPU feature. */
> +#define ARM_FPU_FSET_HAS(S,F) (((S) & (F)) == (F))
> +
> +/* FPU Features. */
> +#define FPU_FL_NONE (0)
> +#define FPU_FL_NEON (1 << 0) /* NEON instructions. */
> +#define FPU_FL_FP16 (1 << 1) /* Half-precision. */
> +#define FPU_FL_CRYPTO (1 << 2) /* Crypto extensions. */
> +
> /* Which floating point model to use. */
> enum arm_fp_model
> {
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2][ARM] Use new FPU features representation
2015-06-22 15:18 ` [PATCH 2/2][ARM] Use new FPU features representation Matthew Wahab
2015-08-10 10:28 ` Matthew Wahab
@ 2015-08-10 14:59 ` Ramana Radhakrishnan
1 sibling, 0 replies; 7+ messages in thread
From: Ramana Radhakrishnan @ 2015-08-10 14:59 UTC (permalink / raw)
To: Matthew Wahab; +Cc: gcc-patches
On Mon, Jun 22, 2015 at 04:18:04PM +0100, Matthew Wahab wrote:
> Hello,
>
> This patch series changes the representation of FPU features to use a simple
> bit-set and flags, as is done elsewhere.
>
> This patch uses the new representation of FPU feature sets.
>
> Tested the series for arm-none-linux-gnueabihf with check-gcc
>
> Ok for trunk?
> Matthew
This is OK
thanks and sorry about the delay.
ramana
>
> gcc/
> 2015-06-22 Matthew Wahab <matthew.wahab@arm.com>
>
> * config/arm/arm-fpus.def: Replace neon, fp16 and crypto boolean
> fields with feature flags. Update comment.
> * config/arm/arm.c (ARM_FPU): Update macro.
> * config/arm/arm.h (TARGET_NEON_FP16): Update feature test.
> (TARGET_FP16): Likewise.
> (TARGET_CRYPTO): Likewise.
> (TARGET_NEON): Likewise.
> (struct arm_fpu_desc): Remove fields neon, fp16 and crypto. Add
> field features.
>
> From 6f9cd1b41d7597d95bd80aa21344f8e6e011e168 Mon Sep 17 00:00:00 2001
> From: Matthew Wahab <matthew.wahab@arm.com>
> Date: Wed, 10 Jun 2015 10:11:56 +0100
> Subject: [PATCH 2/2] Use new FPU feature definitions.
>
> Change-Id: I0c45e52b08b31433ec2b30fcb666584cabcb826b
> ---
> gcc/config/arm/arm-fpus.def | 40 ++++++++++++++++++++--------------------
> gcc/config/arm/arm.c | 4 ++--
> gcc/config/arm/arm.h | 22 +++++++++++++---------
> 3 files changed, 35 insertions(+), 31 deletions(-)
>
> diff --git a/gcc/config/arm/arm-fpus.def b/gcc/config/arm/arm-fpus.def
> index 2dfefd6..efd5896 100644
> --- a/gcc/config/arm/arm-fpus.def
> +++ b/gcc/config/arm/arm-fpus.def
> @@ -19,30 +19,30 @@
>
> /* Before using #include to read this file, define a macro:
>
> - ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO)
> + ARM_FPU(NAME, MODEL, REV, VFP_REGS, FEATURES)
>
> The arguments are the fields of struct arm_fpu_desc.
>
> genopt.sh assumes no whitespace up to the first "," in each entry. */
>
> -ARM_FPU("vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, false, false, false)
> -ARM_FPU("vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false, false)
> -ARM_FPU("vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, true, false)
> -ARM_FPU("vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, false, false)
> -ARM_FPU("vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, true, false)
> -ARM_FPU("vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, false, false)
> -ARM_FPU("vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, true, false)
> -ARM_FPU("neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true , false, false)
> -ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true, true, false)
> -ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, false, true, false)
> -ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, false, true, false)
> -ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, false, true, false)
> -ARM_FPU("fpv5-sp-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_SINGLE, false, true, false)
> -ARM_FPU("fpv5-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_D16, false, true, false)
> -ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, true, true, false)
> -ARM_FPU("fp-armv8", ARM_FP_MODEL_VFP, 8, VFP_REG_D32, false, true, false)
> -ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, false)
> +ARM_FPU("vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, FPU_FL_NONE)
> +ARM_FPU("vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NONE)
> +ARM_FPU("vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_FP16)
> +ARM_FPU("vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, FPU_FL_NONE)
> +ARM_FPU("vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, FPU_FL_FP16)
> +ARM_FPU("vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, FPU_FL_NONE)
> +ARM_FPU("vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, FPU_FL_FP16)
> +ARM_FPU("neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NEON)
> +ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
> +ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, FPU_FL_FP16)
> +ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, FPU_FL_FP16)
> +ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, FPU_FL_FP16)
> +ARM_FPU("fpv5-sp-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_SINGLE, FPU_FL_FP16)
> +ARM_FPU("fpv5-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_D16, FPU_FL_FP16)
> +ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
> +ARM_FPU("fp-armv8", ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_FP16)
> +ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
> ARM_FPU("crypto-neon-fp-armv8",
> - ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, true)
> + ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16 | FPU_FL_CRYPTO)
> /* Compatibility aliases. */
> -ARM_FPU("vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false, false)
> +ARM_FPU("vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NONE)
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index e79a369..e104d2f 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -2231,8 +2231,8 @@ char arm_arch_name[] = "__ARM_ARCH_0UNK__";
>
> static const struct arm_fpu_desc all_fpus[] =
> {
> -#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO) \
> - { NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO },
> +#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, FEATURES) \
> + { NAME, MODEL, REV, VFP_REGS, FEATURES },
> #include "arm-fpus.def"
> #undef ARM_FPU
> };
> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
> index eadbcec..26d48a7 100644
> --- a/gcc/config/arm/arm.h
> +++ b/gcc/config/arm/arm.h
> @@ -193,11 +193,13 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
> #define TARGET_VFP_DOUBLE (TARGET_VFP && arm_fpu_desc->regs != VFP_REG_SINGLE)
>
> /* FPU supports half-precision floating-point with NEON element load/store. */
> -#define TARGET_NEON_FP16 \
> - (TARGET_VFP && arm_fpu_desc->neon && arm_fpu_desc->fp16)
> +#define TARGET_NEON_FP16 \
> + (TARGET_VFP \
> + && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_NEON | FPU_FL_FP16))
>
> /* FPU supports VFP half-precision floating-point. */
> -#define TARGET_FP16 (TARGET_VFP && arm_fpu_desc->fp16)
> +#define TARGET_FP16 \
> + (TARGET_VFP && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_FP16))
>
> /* FPU supports fused-multiply-add operations. */
> #define TARGET_FMA (TARGET_VFP && arm_fpu_desc->rev >= 4)
> @@ -206,14 +208,18 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
> #define TARGET_FPU_ARMV8 (TARGET_VFP && arm_fpu_desc->rev >= 8)
>
> /* FPU supports Crypto extensions. */
> -#define TARGET_CRYPTO (TARGET_VFP && arm_fpu_desc->crypto)
> +#define TARGET_CRYPTO \
> + (TARGET_VFP && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_CRYPTO))
> +
>
> /* FPU supports Neon instructions. The setting of this macro gets
> revealed via __ARM_NEON__ so we add extra guards upon TARGET_32BIT
> and TARGET_HARD_FLOAT to ensure that NEON instructions are
> available. */
> -#define TARGET_NEON (TARGET_32BIT && TARGET_HARD_FLOAT \
> - && TARGET_VFP && arm_fpu_desc->neon)
> +#define TARGET_NEON \
> + (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP \
> + && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_NEON))
> +
>
> /* Q-bit is present. */
> #define TARGET_ARM_QBIT_P(flags) \
> @@ -353,9 +359,7 @@ extern const struct arm_fpu_desc
> enum arm_fp_model model;
> int rev;
> enum vfp_reg_type regs;
> - int neon;
> - int fp16;
> - int crypto;
> + arm_fpu_fset features;
> } *arm_fpu_desc;
>
> /* Which floating point hardware to schedule for. */
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2015-08-10 14:59 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-06-22 15:17 [PATCH 1/2][ARM] Record FPU features as a bit-set Matthew Wahab
2015-06-22 15:18 ` [PATCH 2/2][ARM] Use new FPU features representation Matthew Wahab
2015-08-10 10:28 ` Matthew Wahab
2015-08-10 14:59 ` Ramana Radhakrishnan
2015-08-10 10:28 ` [PATCH 1/2][ARM] Record FPU features as a bit-set Matthew Wahab
2015-08-10 10:55 ` Kyrill Tkachov
2015-08-10 14:57 ` Ramana Radhakrishnan
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