From: Alan Lawrence <alan.lawrence@arm.com>
To: Yvan Roux <yvan.roux@linaro.org>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
Richard Earnshaw <Richard.Earnshaw@arm.com>,
Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>,
Ramana Radhakrishnan <Ramana.Radhakrishnan@arm.com>
Subject: Re: [PATCH] PR target/67127: [ARM] Avoiding odd-number ldrd/strd in movdi introduced a regression on armeb-linux-gnueabihf
Date: Mon, 10 Aug 2015 16:02:00 -0000 [thread overview]
Message-ID: <55C8CAF8.30506@arm.com> (raw)
In-Reply-To: <CAD57uCcQ0ZAxzgyOKOu28GoURGULe3HTKkWj1L_Go-kiY7JsKg@mail.gmail.com>
Yvan Roux wrote:
> Hi,
>
> this patch is a fix for pr27127. It avoids splitting the DI registers
> into SI ones if it is not allowed, which breaks the introduced loop.
> I haven't added a testcase as the bug is already exhibited by several
> regressions (like g++.dg/ext/attribute-test-2.C or g++.dg/eh/simd-1.C)
> but I can add one if you think it is needed. Cross built and
> regtested on trunk and gcc-5 branch and the regression mentioned in
> https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00216.html is not
> observed.
>
> Is it ok for trunk and branch ?
>
> Thanks,
> Yvan
>
> gcc/
>
> PR target/67127
> * config/arm/arm.md (movdi): Avoid forbidden modes changed.
I've just looked into the above 2 testcases on armeb-none-eabi, and in both
cases the infinite loop is due to an ldrd/strd with base register 16. So not an
odd-numbered physical register, but rather something that isn't a physical
register at all.
I observe that FIRST_VIRTUAL_REGISTER is 104, whereas LAST_ARM_REG is 15. So it
might be that the pattern should check against the latter instead of the former
- as arm_hard_regno_mode_ok does...
--Alan
next prev parent reply other threads:[~2015-08-10 16:02 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-07 13:05 Yvan Roux
2015-08-10 16:02 ` Alan Lawrence [this message]
2015-08-10 17:43 ` Yvan Roux
2015-08-11 10:28 ` Ramana Radhakrishnan
2015-08-12 13:32 ` Yvan Roux
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