From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 82528 invoked by alias); 17 Aug 2015 09:21:23 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 82514 invoked by uid 89); 17 Aug 2015 09:21:22 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.8 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 17 Aug 2015 09:21:21 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4CF773F8; Mon, 17 Aug 2015 02:21:12 -0700 (PDT) Received: from [10.2.207.50] (e100706-lin.cambridge.arm.com [10.2.207.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E423A3F59E; Mon, 17 Aug 2015 02:21:16 -0700 (PDT) Message-ID: <55D1A77B.4070105@foss.arm.com> Date: Mon, 17 Aug 2015 09:29:00 -0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: Alexandre Oliva , Andreas Schwab CC: Patrick Marlier , Jeff Law , James Greenhalgh , "H.J. Lu" , Segher Boessenkool , Richard Biener , GCC Patches , Christophe Lyon , David Edelsohn , Eric Botcazou Subject: Re: [PR64164] drop copyrename, integrate into expand References: <20150723203112.GB27818@gate.crashing.org> <20150810082355.GA31149@arm.com> <55C8BFC3.3030603@redhat.com> In-Reply-To: Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2015-08/txt/msg00883.txt.bz2 Hi Alexandre, On 17/08/15 03:56, Alexandre Oliva wrote: > On Aug 16, 2015, Andreas Schwab wrote: > >> Alexandre Oliva writes: >>> On Aug 15, 2015, Andreas Schwab wrote: >>> >>>> FAIL: gcc.target/aarch64/target_attr_crypto_ice_1.c (internal compiler error) >>>> In file included from >>>> /opt/gcc/gcc-20150815/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_1.c:4:0: >>> Are you sure this is a regression introduced by my patch? >> Yes, it reintroduces the ICE. > Ugh. I see this testcase was introduced very recently, so presumably it > wasn't present in the tree that James Greenhalgh tested and confirmed > there were no regressions. Yeah, I introduced it as part of the SWITCHABLE_TARGET work for aarch64. A bit of a mid-air collision :( > The hack in aarch64-builtins.c looks risky IMHO. Changing the mode of a > decl after RTL is assigned to it (or to its SSA partitions) seems fishy. > The assert is doing just what it was supposed to do. The only surprise > to me is that it didn't catch this unexpected and unsupported change > before. > > Presumably if we just dropped the assert in expand_expr_real_1, this > case would work just fine, although the unsignedp bit would be > meaningless and thus confusing, since the subreg isn't about a > promotion, but about reflecting the mode change that was made from under > us. > > May I suggest that you guys find (or introduce) other means to change > the layout and mode of the decl *before* RTL is assigned to the params? > I think this would save us a ton of trouble down the road. Just think > how much trouble you'd get if the different modes had different calling > conventions, alignment requirements, valid register assignments, or > anything that might make coalescing their SSA names with those of other > variables invalid. > I'm not familiar with the intricacies in this area but I'll have a look. Perhaps we can somehow re-layout the SIMD types when switching from a non-simd to a simd target... Can you, or Andreas please file a PR so we don't forget? Thanks, Kyrill