From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 14205 invoked by alias); 10 Sep 2015 08:21:04 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 14183 invoked by uid 89); 10 Sep 2015 08:21:03 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (207.82.80.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 10 Sep 2015 08:21:00 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-10-FUG9jnKbRMmoX6KLdUOjWw-1; Thu, 10 Sep 2015 09:20:55 +0100 Received: from [10.2.207.50] ([10.1.2.79]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 10 Sep 2015 09:20:54 +0100 Message-ID: <55F13D66.9010207@arm.com> Date: Thu, 10 Sep 2015 08:23:00 -0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: GCC Patches CC: Rainer Orth , Jeff Law Subject: [PATCH][RTL-ifcvt] PR rtl-optimization/67465: Handle pairs of complex+simple blocks and empty blocks more gracefully X-MC-Unique: FUG9jnKbRMmoX6KLdUOjWw-1 Content-Type: multipart/mixed; boundary="------------060101080502090808060908" X-IsSubscribed: yes X-SW-Source: 2015-09/txt/msg00647.txt.bz2 This is a multi-part message in MIME format. --------------060101080502090808060908 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Content-length: 1447 Hi all, This is the second attempt to fix the PRs. The first one at https://gcc.gnu.org/ml/gcc-patches/2015-09/msg00449.html does the trick, but is overly restrictive. This one allows for cases when one block is complex and the other one is si= mple or empty. Earlier, this case would bypass the bbs_ok_for_cmove_arith and we would end= up if-converting cases where the 'else' part (x :=3D b) was pulled from the te= st block earlier in the call chain. If the reg 'b' in this case was also written to = by the 'then' block, then we would miscompile. With this patch we move the original 'b' value into a pseudo before potenti= ally clobbering it, so all is wired up properly. With this patch the PRs work for me and the restriction on if-conversion is= not overly aggressive. Rainer, could you please check that this patch still fixes the SPARC regres= sions? I've bootstrapped and tested this on x86_64 and aarch64. Ok for trunk if SPARC testing is fine? Thanks, Kyrill 2015-09-10 Kyrylo Tkachov PR rtl-optimization/67456 PR rtl-optimization/67464 PR rtl-optimization/67465 PR rtl-optimization/67481 * ifcvt.c (noce_try_cmove_arith): Bail out if cannot conditionally move in the mode of x. Handle combination of complex and simple block pairs as well as the case when one is empty. 2015-09-10 Kyrylo Tkachov * gcc.dg/pr67465.c: New test. --------------060101080502090808060908 Content-Type: text/x-patch; name=ifcvt-bug-fix.patch Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="ifcvt-bug-fix.patch" Content-length: 2802 commit ca25fa7000dd9d086b78bf9a02126f83fbab8073 Author: Kyrylo Tkachov Date: Mon Sep 7 14:58:01 2015 +0100 [RTL-ifcvt] PR rtl-optimization/67465: Do not ifcvt complex blocks if t= he else block is empty diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c index d2f5b66..9adce60 100644 --- a/gcc/ifcvt.c +++ b/gcc/ifcvt.c @@ -1997,6 +1997,7 @@ noce_try_cmove_arith (struct noce_if_info *if_info) rtx a =3D if_info->a; rtx b =3D if_info->b; rtx x =3D if_info->x; + machine_mode x_mode =3D GET_MODE (x); rtx orig_a, orig_b; rtx_insn *insn_a, *insn_b; bool a_simple =3D if_info->then_simple; @@ -2008,6 +2009,9 @@ noce_try_cmove_arith (struct noce_if_info *if_info) enum rtx_code code; rtx_insn *ifcvt_seq; =20 + if (!can_conditionally_move_p (x_mode)) + return FALSE; + /* A conditional move from two memory sources is equivalent to a conditional on their addresses followed by a load. Don't do this early because it'll screw alias analysis. Note that we've @@ -2079,13 +2083,32 @@ noce_try_cmove_arith (struct noce_if_info *if_info) } } =20 - if (!a_simple && then_bb && !b_simple && else_bb + if (then_bb && else_bb && !a_simple && !b_simple && (!bbs_ok_for_cmove_arith (then_bb, else_bb) || !bbs_ok_for_cmove_arith (else_bb, then_bb))) return FALSE; =20 start_sequence (); =20 + /* If one of the blocks is empty then the corresponding B or A value + came from the test block. The non-empty complex block that we will + emit might clobber the register used by B or A, so move it to a pseudo + first. */ + + if (b_simple || !else_bb) + { + rtx tmp_b =3D gen_reg_rtx (x_mode); + noce_emit_move_insn (tmp_b, b); + b =3D tmp_b; + } + + if (a_simple || !then_bb) + { + rtx tmp_a =3D gen_reg_rtx (x_mode); + noce_emit_move_insn (tmp_a, a); + a =3D tmp_a; + } + orig_a =3D a; orig_b =3D b; =20 diff --git a/gcc/testsuite/gcc.dg/pr67465.c b/gcc/testsuite/gcc.dg/pr67465.c new file mode 100644 index 0000000..321fd38 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr67465.c @@ -0,0 +1,53 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -std=3Dgnu99" } */ + +int a, b, c, d, e, h; + +int +fn1 (int p1) +{ + { + int g[2]; + for (int i =3D 0; i < 1; i++) + g[i] =3D 0; + if (g[0] < c) + { + a =3D (unsigned) (1 ^ p1) % 2; + return 0; + } + } + return 0; +} + +void +fn2 () +{ + for (h =3D 0; h < 1; h++) + { + for (int j =3D 0; j < 2; j++) + { + for (b =3D 1; b; b =3D 0) + a =3D 1; + for (; b < 1; b++) + ; + if (e) + continue; + a =3D 2; + } + fn1 (h); + short k =3D -16; + d =3D k > a; + } +} + +int +main () +{ + fn2 (); + + if (a !=3D 2) + __builtin_abort (); + + return 0; +} + --------------060101080502090808060908--