From: Kyrill Tkachov <kyrylo.tkachov@arm.com>
To: Andrew Pinski <pinskia@gmail.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
Marcus Shawcroft <Marcus.Shawcroft@arm.com>,
James Greenhalgh <James.Greenhalgh@arm.com>,
Richard Earnshaw <Richard.Earnshaw@arm.com>
Subject: Re: [PATCH][AArch64] Use preferred aliases for CSNEG, CSINC, CSINV
Date: Mon, 21 Sep 2015 13:25:00 -0000 [thread overview]
Message-ID: <5600032F.4080604@arm.com> (raw)
In-Reply-To: <CA+=Sn1k7ZybbX=oH1Ar4pv-6fuN9AVfbZ7VsrxcdF2E_-gtzwQ@mail.gmail.com>
Hi Andrew,
On 12/09/15 02:15, Andrew Pinski wrote:
> On Tue, Sep 1, 2015 at 6:08 PM, Kyrill Tkachov <kyrylo.tkachov@arm.com> wrote:
>> Hi all,
>>
>> The ARMv8-A reference manual says:
>> "CNEG <Wd>, <Wn>, <cond>
>> is equivalent to
>> CSNEG <Wd>, <Wn>, <Wn>, invert(<cond>)
>> and is the preferred disassembly when Rn == Rm && cond != '111x'."
>>
>> That is, when the two input registers are the same we can use the shorter
>> CNEG mnemonic
>> with the inverse condition instead of the longer CSNEG instruction.
>> Similarly for the
>> CSINV and CSINC instructions, they have shorter CINV and CINC forms.
>> This patch adjusts the output templates to emit the preferred shorter
>> sequences when possible.
>>
>> The new mnemonics are just aliases, they map down to the same instruction in
>> the end, so there
>> are no performance or behaviour implications. But it does make the assembly
>> a bit more readable
>> IMO, since:
>> "cneg w27, w9, le"
>> can be simply read as "if the condition is less or equal negate w9" instead
>> of the previous:
>> "csneg w27, w9, w9, gt" where you have to remember which of the input
>> registers is negated.
>>
>>
>> Bootstrapped and tested on aarch64-linux-gnu.
>> Ok for trunk?
> I really think this kind of special casing is not correct and does not
> belong in the compiler. The main reason it complicates the back-end
> more than the benefit of easier of reading the assembly code.
<sorry for the delay>.
The complication is an extra if-else statement with
explicit strings on each arm i.e. there's no snprintf trickery.
I tend to read a lot of the generated assembly when performing assembly
comparisons while working on performance patches and I find that having
the cneg from with two register operands and the negate condition is quicker
to parse than the full csneg form where I need to remember that extra bit
of info that the condition there must be inverted to get the negation condition.
If you feel very strongly against this I can withdraw this patch, but I'd rather have it in.
FWIW, clang also emits the CNEG when it can AFAICS, though I admit that's not necessarily a strong
argument for this change.
Kyrill
>
> Thanks,
> Andrew Pinski
>
>> Thanks,
>> Kyrill
>>
>> 2015-09-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
>>
>> * config/aarch64/aarch64.md (csinc3<mode>_insn): Use CINC
>> mnemonic when possible.
>> (*csinv3<mode>_insn): Use CINV mnemonic when possible.
>> (csneg3<mode>_insn): USE CNEG mnemonic when possible.
>>
>> 2015-09-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
>>
>> * gcc.target/aarch64/abs_1.c: Update scan-assembler checks
>> to allow cneg.
>> * gcc.target/aarch64/cond_op_imm_1.c: Likewise. Likewise for cinv.
>> * gcc.target/aarch64/mod_2.c: Likewise.
prev parent reply other threads:[~2015-09-21 13:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-01 10:08 Kyrill Tkachov
2015-09-11 15:26 ` Kyrill Tkachov
2015-09-11 15:38 ` James Greenhalgh
2015-09-11 16:29 ` Kyrill Tkachov
2015-09-12 2:04 ` Andrew Pinski
2015-09-21 13:25 ` Kyrill Tkachov [this message]
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