From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 63972 invoked by alias); 1 Oct 2015 12:28:15 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 63941 invoked by uid 89); 1 Oct 2015 12:28:14 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-qg0-f54.google.com Received: from mail-qg0-f54.google.com (HELO mail-qg0-f54.google.com) (209.85.192.54) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Thu, 01 Oct 2015 12:28:13 +0000 Received: by qgez77 with SMTP id z77so62922170qge.1 for ; Thu, 01 Oct 2015 05:28:11 -0700 (PDT) X-Received: by 10.140.84.116 with SMTP id k107mr11418354qgd.63.1443702491444; Thu, 01 Oct 2015 05:28:11 -0700 (PDT) Received: from ?IPv6:2601:181:c000:c497:a2a8:cdff:fe3e:b48? ([2601:181:c000:c497:a2a8:cdff:fe3e:b48]) by smtp.googlemail.com with ESMTPSA id a73sm2307045qkj.27.2015.10.01.05.28.10 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 01 Oct 2015 05:28:10 -0700 (PDT) Subject: Re: [gomp4] remove goacc locking To: Thomas Schwinge References: <56096319.3000504@acm.org> <87612rronb.fsf@kepler.schwinge.homeip.net> Cc: GCC Patches From: Nathan Sidwell Message-ID: <560D26DA.5030108@acm.org> Date: Thu, 01 Oct 2015 12:28:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <87612rronb.fsf@kepler.schwinge.homeip.net> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2015-10/txt/msg00045.txt.bz2 On 10/01/15 04:14, Thomas Schwinge wrote: > Hi Nathan! > > On Mon, 28 Sep 2015 11:56:09 -0400, Nathan Sidwell wrote: >> I've committed this to remove the now no longer needed lock and unlock builtins >> and related infrastructure. > > If I understand correctly, it is an implementation detail of the nvptx > offloading implementation that it doesn't require such locking > primitives, but such locking may still be required for other (future) > offloading implementations, at which point something like the following > would have to be introduced again: I thought about that. Other implementations can also use the lockless idiom. There's always going to be a cmp&swap atomic, otherwise the HW is terribly designed. lock/unlock doesn't work between PTX warps, as we've discovered, and I think the same will probably be true of HSA, as that's roughly the same conceptually. If it turns out I'm wrong, these bits can always be resurrected then. The reason I originally went with lock/unlock is that it was conceptually simpler. The lockless scheme is quite straight forwards, once one understands the underlying concept. nathan