From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 58805 invoked by alias); 28 Oct 2015 18:41:29 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 58787 invoked by uid 89); 28 Oct 2015 18:41:28 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.3 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: usmailout1.samsung.com Received: from mailout1.w2.samsung.com (HELO usmailout1.samsung.com) (211.189.100.11) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Wed, 28 Oct 2015 18:41:27 +0000 Received: from uscpsbgm1.samsung.com (u114.gpu85.samsung.co.kr [203.254.195.114]) by mailout1.w2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NWY00KPN190LO80@mailout1.w2.samsung.com> for gcc-patches@gcc.gnu.org; Wed, 28 Oct 2015 14:41:24 -0400 (EDT) Received: from ussync2.samsung.com ( [203.254.195.82]) by uscpsbgm1.samsung.com (USCPMTA) with SMTP id C0.19.03663.4D611365; Wed, 28 Oct 2015 14:41:24 -0400 (EDT) Received: from [172.31.207.192] ([105.140.31.209]) by ussync2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NWY001JT18Z3O80@ussync2.samsung.com>; Wed, 28 Oct 2015 14:41:24 -0400 (EDT) Subject: Re: [PATCH][AArch64] Replace insn to zero up DF register References: <56257F53.2000905@samsung.com> Cc: Andrew Pinski , Marcus Shawcroft , Kyrill Tkachov To: GCC Patches From: Evandro Menezes Message-id: <563116D2.6080803@samsung.com> Date: Wed, 28 Oct 2015 18:49:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-version: 1.0 In-reply-to: Content-type: text/plain; charset=utf-8; format=flowed Content-transfer-encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2015-10/txt/msg03097.txt.bz2 Ping. -- Evandro Menezes On 10/20/2015 09:27 AM, Andrew Pinski wrote: > On Tue, Oct 20, 2015 at 7:59 AM, Andrew Pinski wrote: >> On Tue, Oct 20, 2015 at 7:51 AM, Andrew Pinski wrote: >>> On Tue, Oct 20, 2015 at 7:40 AM, Evandro Menezes wrote: >>>> In the existing targets, it seems that it's always faster to zero up a DF >>>> register with "movi %d0, #0" instead of "fmov %d0, xzr". >>> I think for ThunderX 1, this change will not make a difference. So I >>> am neutral on this change. >> Actually depending on fmov is decoded in our pipeline, this change >> might actually be worse. Currently fmov with an immediate is 1 cycle >> while movi is two cycles. Let me double check how internally on how >> it is decoded and if it is 1 cycle or two. > Ok, my objections are removed as I talked with the architectures here > at Cavium and using movi is better in this case. > > Thanks, > Andrew > >> Thanks, >> Andrew >> >>> Thanks, >>> Andrew >>> >>>> This patch modifies the respective pattern. >>>> >>>> Please, commit if it's alright. >>>> >>>> Thank you, >>>> >>>> -- >>>> Evandro Menezes >>>>