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From: Kyrill Tkachov <kyrylo.tkachov@arm.com>
To: GCC Patches <gcc-patches@gcc.gnu.org>
Cc: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>,
	 Richard Earnshaw <Richard.Earnshaw@arm.com>
Subject: [PATCH][ARM] Fix checking RTL error in cortex_a9_sched_adjust_cost
Date: Thu, 29 Oct 2015 16:03:00 -0000	[thread overview]
Message-ID: <5632430F.7080402@arm.com> (raw)

[-- Attachment #1: Type: text/plain, Size: 632 bytes --]

Hi all,

An arm-none-eabi build with RTL checking and --with-cpu=cortex-a9 fails because
cortex_a9_sched_adjust_cost tries to access the SET_DEST of a PARALLEL.
The correct thing to do is to call single_set on dep, which will return a simple SET
that we can take the SET_DEST of or NULL if there's more than one SET.

This patch does that.
The arm-none-eabi build passes.
Bootstrapped and tested on arm-none-linux-gnueabihf.

Ok for trunk?

Thanks,
Kyrill

2015-10-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

     * config/arm/arm.c (cortex_a9_sched_adjust_cost): Use reg_set_p to
     check for dependencies.

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: arm-ca9-checking.patch --]
[-- Type: text/x-patch; name=arm-ca9-checking.patch, Size: 918 bytes --]

commit bef3ba20485085d702b9a6c8683683db49b547f0
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date:   Tue Oct 27 18:09:29 2015 +0000

    [ARM] Fix checking RTL error in cortex_a9_sched_adjust_cost

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 08a852d..452b23d 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -11649,9 +11649,7 @@ cortex_a9_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int * cost
 		       case. However this gets modeled as an true
 		       dependency and hence all these checks.  */
 		    if (REG_P (SET_DEST (PATTERN (insn)))
-			&& REG_P (SET_DEST (PATTERN (dep)))
-			&& reg_overlap_mentioned_p (SET_DEST (PATTERN (insn)),
-						    SET_DEST (PATTERN (dep))))
+			&& reg_set_p (SET_DEST (PATTERN (insn)), dep))
 		      {
 			/* FMACS is a special case where the dependent
 			   instruction can be issued 3 cycles before

             reply	other threads:[~2015-10-29 16:02 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-29 16:03 Kyrill Tkachov [this message]
2015-10-30 14:42 ` Ramana Radhakrishnan
2015-10-30 15:48   ` Kyrill Tkachov
2015-11-06 11:37     ` Kyrill Tkachov
2015-11-06 11:38       ` Kyrill Tkachov

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