Re: [PATCH][combine][RFC] Don't transform sign and zero extends inside mults

[Jeff Law <law@redhat.com>]

On 11/02/2015 07:15 AM, Kyrill Tkachov wrote:
> Hi all,
>
> This patch attempts to restrict combine from transforming ZERO_EXTEND
> and SIGN_EXTEND operations into and-bitmask
> and weird SUBREG expressions when they appear inside MULT expressions.
> This is because a MULT rtx containing these
> extend operations is usually a well understood widening multiply operation.
> However, if the costs for simple zero or sign-extend moves happen to
> line up in a particular way,
> expand_compound_operation will end up mangling a perfectly innocent
> extend+mult+add rtx like:
>   (set (reg/f:DI 393)
>      (plus:DI (mult:DI (sign_extend:DI (reg/v:SI 425 [ selected ]))
>              (sign_extend:DI (reg:SI 606)))
>           (reg:DI 600)))
>
> into:
>   (set (reg/f:DI 393)
>      (plus:DI (mult:DI (and:DI (subreg:DI (reg:SI 606) 0)
>                  (const_int 202 [0xca]))
>              (sign_extend:DI (reg/v:SI 425 [ selected ])))
>           (reg:DI 600)))
Going to leave the review side of this for Segher.

If you decide to go forward, there's a section in md.texi WRT 
canonicalization of these RTL codes that probably would need updating. 
Just search for "canonicalization" section and read down a ways.


Jeff