From: Kyrill Tkachov <kyrylo.tkachov@arm.com>
To: Nikolai Bozhenov <nikolai.bozhenov@gmail.com>,
Ramana Radhakrishnan <ramana.radhakrishnan@foss.arm.com>,
GCC Patches <gcc-patches@gcc.gnu.org>
Cc: Marcus Shawcroft <marcus.shawcroft@arm.com>,
Richard Earnshaw <Richard.Earnshaw@arm.com>,
James Greenhalgh <james.greenhalgh@arm.com>
Subject: Re: [PATCH][ARM/AArch64] PR 68088: Fix RTL checking ICE due to subregs inside accumulator forwarding check
Date: Fri, 06 Nov 2015 17:16:00 -0000 [thread overview]
Message-ID: <563CE062.8090509@arm.com> (raw)
In-Reply-To: <563CDED9.6020903@arm.com>
On 06/11/15 17:09, Kyrill Tkachov wrote:
>
> On 06/11/15 17:07, Nikolai Bozhenov wrote:
>> On 11/06/2015 04:46 PM, Ramana Radhakrishnan wrote:
>>>> Hi!
>>>>
>>>> I faced the same issue but I had somewhat different RTL for the consumer:
>>>>
>>>> (insn 20 15 21 2 (set (reg/i:SI 0 r0)
>>>> (minus:SI (subreg:SI (reg:DI 117) 4)
>>>> (mult:SI (reg:SI 123)
>>>> (reg:SI 114)))) gasman.c:4 48 {*mulsi3subsi})
>>>>
>>>> where (reg:DI 117) is produced by umulsidi3_v6 instruction. Is it
>>>> really true that (subreg:SI (reg:DI 117) 4) may be forwarded in one
>>>> cycle in this case?
>>> If the accumulator can be forwarded (i.e. a SImode register), there isn't a reason why a subreg:SI (reg:DI) will not get forwarded.
>>>
>>> The subreg:SI is an artifact before register allocation, thus it's a representation issue that the patch is fixing here unless I misunderstand your question.
>>>
>> I mean, in my example it is not the multiplication result that is
>> forwarded but its upper part. So, shouldn't we check that offset in a
>> subreg expression is zero? Or is it ok to forward only the upper part
>> of a multiplication?
>
> Could you please post the full RTL instruction we're talking about here as it appears in the scheduler dump?
> So that we're all on the same page about which case we're talking about.
>
Sorry, missed the above instruction.
This subreg is just a pre-register allocation representation of the instruction and will go away after reload.
This particular function only really has a real effect in post-reload scheduling as it's only there when the final
register numbers are known.
Kyrill
> Thanks,
> Kyrill
>
>>
>> Thanks,
>> Nikolai
>>
>
next prev parent reply other threads:[~2015-11-06 17:16 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-28 10:08 Kyrill Tkachov
2015-10-29 13:50 ` Marcus Shawcroft
2015-10-29 14:00 ` Kyrill Tkachov
2015-10-29 14:02 ` Marcus Shawcroft
2015-10-29 14:18 ` Kyrill Tkachov
2015-11-06 11:39 ` Kyrill Tkachov
2015-11-06 11:50 ` Ramana Radhakrishnan
2015-11-06 12:26 ` Nikolai Bozhenov
2015-11-06 13:46 ` Ramana Radhakrishnan
2015-11-06 17:08 ` Nikolai Bozhenov
2015-11-06 17:09 ` Kyrill Tkachov
2015-11-06 17:16 ` Kyrill Tkachov [this message]
2015-11-09 8:14 ` Nikolai Bozhenov
2015-11-09 9:22 ` Kyrill Tkachov
2015-11-06 17:32 ` Nikolai Bozhenov
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