[PATCH, i386]: Fix gcc.c-torture/compile/pr41634.c FAIL

[PATCH, i386]: Fix gcc.c-torture/compile/pr41634.c FAIL

[Uros Bizjak]

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Hello!

Recent AS patches introduced the above compilation failure. We have to
treat movabs operands in a special way - without %rip and inside
square bracket for -masm=intel.

Also, the patch removes dead code while at it.

2015-11-10  Uros Bizjak  <ubizjak@gmail.com>

    * config/i386/i386.c (ix86_print_operand): Remove dead code that
    tried to avoid (%rip) for call operands.

2015-11-10  Uros Bizjak  <ubizjak@gmail.com>

    * config/i386/i386.c (ix86_print_operand_address_as): Add no_rip
    argument.  Do not use RIP relative addressing when no_rip is set.
    (ix86_print_operand): Update call to ix86_print_operand_address_as.
    (ix86_print_operand_address): Ditto.
    * config/i386/i386.md (*movabs<mode>_1): Use %P modifier for
    absolute movabs operand 0.  Add square braces for -masm=intel.
    (*movabs<mode>_2): Ditto for operand 1.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32} and
committed to mainline SVN.

Uros.

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Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md	(revision 230084)
+++ config/i386/i386.md	(working copy)
@@ -2601,7 +2601,7 @@
   switch (which_alternative)
     {
     case 0:
-      return "movabs{<imodesuffix>}\t{%1, %0|%0, %1}";
+      return "movabs{<imodesuffix>}\t{%1, %P0|[%P0], %1}";
     case 1:
       return "mov{<imodesuffix>}\t{%1, %0|%0, %1}";
     default:
@@ -2625,7 +2625,7 @@
   switch (which_alternative)
     {
     case 0:
-      return "movabs{<imodesuffix>}\t{%1, %0|%0, %1}";
+      return "movabs{<imodesuffix>}\t{%P1, %0|%0, [%P1]}";
     case 1:
       return "mov{<imodesuffix>}\t{%1, %0|%0, %1}";
     default:
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c	(revision 230084)
+++ config/i386/i386.c	(working copy)
@@ -80,7 +80,7 @@ along with GCC; see the file COPYING3.  If not see
 static rtx legitimize_dllimport_symbol (rtx, bool);
 static rtx legitimize_pe_coff_extern_decl (rtx, bool);
 static rtx legitimize_pe_coff_symbol (rtx, bool);
-static void ix86_print_operand_address_as (FILE *file, rtx addr, addr_space_t);
+static void ix86_print_operand_address_as (FILE *, rtx, addr_space_t, bool);
 
 #ifndef CHECK_STACK_LIMIT
 #define CHECK_STACK_LIMIT (-1)
@@ -17131,13 +17131,6 @@ ix86_print_operand (FILE *file, rtx x, int code)
     {
       rtx addr = XEXP (x, 0);
 
-      /* Avoid (%rip) for call operands.  */
-      if (code == 'P' && CONSTANT_ADDRESS_P (x) && !CONST_INT_P (x))
-	{
-	  output_addr_const (file, addr);
-	  return;
-	}
-
       /* No `byte ptr' prefix for call instructions ... */
       if (ASSEMBLER_DIALECT == ASM_INTEL && code != 'X' && code != 'P')
 	{
@@ -17187,7 +17180,8 @@ ix86_print_operand (FILE *file, rtx x, int code)
       if (this_is_asm_operands && ! address_operand (addr, VOIDmode))
 	output_operand_lossage ("invalid constraints for operand");
       else
-	ix86_print_operand_address_as (file, addr, MEM_ADDR_SPACE (x));
+	ix86_print_operand_address_as
+	  (file, addr, MEM_ADDR_SPACE (x), code == 'p' || code == 'P');
     }
 
   else if (CONST_DOUBLE_P (x) && GET_MODE (x) == SFmode)
@@ -17272,7 +17266,8 @@ ix86_print_operand_punct_valid_p (unsigned char co
 /* Print a memory operand whose address is ADDR.  */
 
 static void
-ix86_print_operand_address_as (FILE *file, rtx addr, addr_space_t as)
+ix86_print_operand_address_as (FILE *file, rtx addr,
+			       addr_space_t as, bool no_rip)
 {
   struct ix86_address parts;
   rtx base, index, disp;
@@ -17346,7 +17341,7 @@ static void
     }
 
   /* Use one byte shorter RIP relative addressing for 64bit mode.  */
-  if (TARGET_64BIT && !base && !index)
+  if (TARGET_64BIT && !base && !index && !no_rip)
     {
       rtx symbol = disp;
 
@@ -17505,7 +17500,7 @@ static void
 static void
 ix86_print_operand_address (FILE *file, machine_mode /*mode*/, rtx addr)
 {
-  ix86_print_operand_address_as (file, addr, ADDR_SPACE_GENERIC);
+  ix86_print_operand_address_as (file, addr, ADDR_SPACE_GENERIC, false);
 }
 
 /* Implementation of TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA.  */

Re: [PATCH, i386]: Fix gcc.c-torture/compile/pr41634.c FAIL

[Richard Henderson]

On 11/10/2015 06:54 PM, Uros Bizjak wrote:
> -      return "movabs{<imodesuffix>}\t{%1, %0|%0, %1}";
> +      return "movabs{<imodesuffix>}\t{%1, %P0|[%P0], %1}";

The thing that's missing from this, that's present in the patch that I sent you 
off-list, is the <iptrsize> thing for Intel syntax.

Would you prefer to just add that back here via <iptrsize>, rather than using a 
new %v specifier like in my patch?


r~

Re: [PATCH, i386]: Fix gcc.c-torture/compile/pr41634.c FAIL

[Uros Bizjak]

On Tue, Nov 10, 2015 at 7:00 PM, Richard Henderson <rth@redhat.com> wrote:
> On 11/10/2015 06:54 PM, Uros Bizjak wrote:
>>
>> -      return "movabs{<imodesuffix>}\t{%1, %0|%0, %1}";
>> +      return "movabs{<imodesuffix>}\t{%1, %P0|[%P0], %1}";
>
>
> The thing that's missing from this, that's present in the patch that I sent
> you off-list, is the <iptrsize> thing for Intel syntax.
>
> Would you prefer to just add that back here via <iptrsize>, rather than
> using a new %v specifier like in my patch?

I have opted for the same assembly code as it was generated
previously. But, since we have macroized pattern and already available
mode attribute, I'd prefer to use <iptrsize> PTR [...]. There are
already a couple of examples using this approach in i386.md.

BTW: gas is able to determine pointer size from register name, so
having PTR prefix does not change generated object code.

Uros.

Re: [PATCH, i386]: Fix gcc.c-torture/compile/pr41634.c FAIL

[Uros Bizjak]

On Tue, Nov 10, 2015 at 7:14 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Tue, Nov 10, 2015 at 7:00 PM, Richard Henderson <rth@redhat.com> wrote:
>> On 11/10/2015 06:54 PM, Uros Bizjak wrote:
>>>
>>> -      return "movabs{<imodesuffix>}\t{%1, %0|%0, %1}";
>>> +      return "movabs{<imodesuffix>}\t{%1, %P0|[%P0], %1}";
>>
>>
>> The thing that's missing from this, that's present in the patch that I sent
>> you off-list, is the <iptrsize> thing for Intel syntax.
>>
>> Would you prefer to just add that back here via <iptrsize>, rather than
>> using a new %v specifier like in my patch?
>
> I have opted for the same assembly code as it was generated
> previously. But, since we have macroized pattern and already available
> mode attribute, I'd prefer to use <iptrsize> PTR [...]. There are
> already a couple of examples using this approach in i386.md.
>
> BTW: gas is able to determine pointer size from register name, so
> having PTR prefix does not change generated object code.

I'm testing following patch:

--cut here--
Index: i386.md
===================================================================
--- i386.md     (revision 230117)
+++ i386.md     (working copy)
@@ -2601,7 +2601,7 @@
   switch (which_alternative)
     {
     case 0:
-      return "movabs{<imodesuffix>}\t{%1, %P0|[%P0], %1}";
+      return "movabs{<imodesuffix>}\t{%1, %P0|<iptrsize> PTR [%P0], %1}";
     case 1:
       return "mov{<imodesuffix>}\t{%1, %0|%0, %1}";
     default:
@@ -2625,7 +2625,7 @@
   switch (which_alternative)
     {
     case 0:
-      return "movabs{<imodesuffix>}\t{%P1, %0|%0, [%P1]}";
+      return "movabs{<imodesuffix>}\t{%P1, %0|%0, <iptrsize> PTR [%P1]}";
     case 1:
       return "mov{<imodesuffix>}\t{%1, %0|%0, %1}";
     default:
--cut here--

Uros.