From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 124354 invoked by alias); 16 Nov 2015 17:21:30 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 124336 invoked by uid 89); 16 Nov 2015 17:21:30 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (207.82.80.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 16 Nov 2015 17:21:28 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-38-0FLo6y4lQD23WrU-GXDRZQ-1; Mon, 16 Nov 2015 17:18:48 +0000 Received: from [10.2.206.200] ([10.1.2.79]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 16 Nov 2015 17:18:47 +0000 Message-ID: <564A0FF7.7070204@arm.com> Date: Mon, 16 Nov 2015 17:21:00 -0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: James Greenhalgh , gcc-patches@gcc.gnu.org CC: kyrtka01@arm.com, ramana.radhakrishnan@arm.com, richard.earnshaw@arm.com Subject: Re: [Patch ARM] Add support for Cortex-A35 References: <1447684618-37158-1-git-send-email-james.greenhalgh@arm.com> <1447684941-37806-1-git-send-email-james.greenhalgh@arm.com> In-Reply-To: <1447684941-37806-1-git-send-email-james.greenhalgh@arm.com> X-MC-Unique: 0FLo6y4lQD23WrU-GXDRZQ-1 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2015-11/txt/msg01976.txt.bz2 On 16/11/15 14:42, James Greenhalgh wrote: > Hi, > > This patch adds support to the ARM back-end for the Cortex-A35 > processor, as recently announced by ARM. The ARM Cortex-A35 provides > full support for the ARMv8-A architecture, including the CRC extension, > with optional Advanced-SIMD and Floating-Point support. We therefore set > feature flags for this CPU to FL_FOR_ARCH8A and FL_CRC32 and FL_LDSCHED, > in the same fashion as Cortex-A53 and Cortex-A57. While the Cortex-A35 > has dual issue capabilities, we model it with an issue rate of one, with > the expectation that this will give better schedules when using the > Cortex-A53 pipeline model. > > Bootstrapped with --with-tune=3Dcortex-a35 with no issues. > > I'm sorry to have this upstream a little late for the close of Stage 1, > I wanted to wait for binutils support to be committed. This happened > on Thursday [1]. If it is OK with the ARM maintainers, I'd like to get > this in to GCC 6. > > OK? > > Thanks, > James > > [1]: https://sourceware.org/ml/binutils-cvs/2015-11/msg00065.html > > --- > 2015-11-16 James Greenhalgh > > * config/arm/arm-cores.def (cortex-a35): New. > * config/arm/arm.c (arm_cortex_a35_tune): New. > * config/arm/arm-tables.opt: Regenerate. > * config/arm/arm-tune.md: Regenerate. > * config/arm/bpabi.h (BE8_LINK_SPEC): Add cortex-a35. > * config/arm/t-aprofile: Likewise. > * doc/invoke.texi (-mcpu): Likewise. > Ok. Thanks, Kyrill