From: Ramana Radhakrishnan <ramana.radhakrishnan@foss.arm.com>
To: Kyrill Tkachov <kyrylo.tkachov@arm.com>,
GCC Patches <gcc-patches@gcc.gnu.org>
Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>
Subject: Re: [PATCH][ARM] PR 68149 Fix ICE in unaligned_loaddi split
Date: Fri, 20 Nov 2015 15:11:00 -0000 [thread overview]
Message-ID: <564F3824.1000907@foss.arm.com> (raw)
In-Reply-To: <56422A10.80500@arm.com>
On 10/11/15 17:32, Kyrill Tkachov wrote:
> Hi all,
>
> This ICE in this PR occurs when we're trying to split unaligned_loaddi into two SImode unaligned loads.
> The problem is in the addressing mode. When reload was picking the addressing mode we accepted an offset of
> -256 because the mode in the pattern is advertised as DImode and that was accepted by the legitimate address
> hooks because they thought it was a NEON load (DImode is in VALID_NEON_DREG_MODE). However, the splitter wants
> to generate two normal SImode unaligned loads using that address, for which -256 is not valid, so we ICE
> in gen_lowpart.
>
> The only way unaligned_loaddi could be generated was through the gen_movmem_ldrd_strd expansion that implements
> a memmove using LDRD and STRD sequences. If the memmove source is not aligned we can't use LDRDs so the code
> generates unaligned_loaddi patterns and expects them to be split into two normal loads after reload. Similarly
> for unaligned store destinations.
>
> This patch just explicitly generates the two unaligned SImode loads or stores when appropriate inside
> gen_movmem_ldrd_strd. This makes the unaligned_loaddi and unaligned_storedi patterns unused, so we can remove them.
>
> This patch fixes the ICe in gcc.target/aarch64/advsimd-intrinsics/vldX.c seen with
> -mthumb -mcpu=cortex-a15 -mfpu=neon-vfpv4 -mfloat-abi=hard -mfp16-format=ieee
> so no new testcase is added.
>
> Bootstrapped and tested on arm-none-linux-gnueabihf.
>
> Ok for trunk?
>
> Thanks,
> Kyrill
>
> 2015-11-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
>
> PR target/68149
> * config/arm/arm.md (unaligned_loaddi): Delete.
> (unaligned_storedi): Likewise.
> * config/arm/arm.c (gen_movmem_ldrd_strd): Don't generate
> unaligned DImode memory ops. Instead perform two back-to-back
> unalgined SImode ops.
s/unalgined/unaligned.
Ok.
Ramana
prev parent reply other threads:[~2015-11-20 15:11 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-10 17:32 Kyrill Tkachov
2015-11-18 15:27 ` Kyrill Tkachov
2015-11-20 15:11 ` Ramana Radhakrishnan [this message]
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