From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 129552 invoked by alias); 20 Nov 2015 15:11:37 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 129531 invoked by uid 89); 20 Nov 2015 15:11:36 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.0 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 20 Nov 2015 15:11:34 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 15DE43A1; Fri, 20 Nov 2015 07:11:17 -0800 (PST) Received: from [10.2.206.27] (e105545-lin.cambridge.arm.com [10.2.206.27]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 606543F267; Fri, 20 Nov 2015 07:11:32 -0800 (PST) Subject: Re: [PATCH][ARM] PR 68149 Fix ICE in unaligned_loaddi split To: Kyrill Tkachov , GCC Patches References: <56422A10.80500@arm.com> Cc: Richard Earnshaw From: Ramana Radhakrishnan Message-ID: <564F3824.1000907@foss.arm.com> Date: Fri, 20 Nov 2015 15:11:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <56422A10.80500@arm.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2015-11/txt/msg02502.txt.bz2 On 10/11/15 17:32, Kyrill Tkachov wrote: > Hi all, > > This ICE in this PR occurs when we're trying to split unaligned_loaddi into two SImode unaligned loads. > The problem is in the addressing mode. When reload was picking the addressing mode we accepted an offset of > -256 because the mode in the pattern is advertised as DImode and that was accepted by the legitimate address > hooks because they thought it was a NEON load (DImode is in VALID_NEON_DREG_MODE). However, the splitter wants > to generate two normal SImode unaligned loads using that address, for which -256 is not valid, so we ICE > in gen_lowpart. > > The only way unaligned_loaddi could be generated was through the gen_movmem_ldrd_strd expansion that implements > a memmove using LDRD and STRD sequences. If the memmove source is not aligned we can't use LDRDs so the code > generates unaligned_loaddi patterns and expects them to be split into two normal loads after reload. Similarly > for unaligned store destinations. > > This patch just explicitly generates the two unaligned SImode loads or stores when appropriate inside > gen_movmem_ldrd_strd. This makes the unaligned_loaddi and unaligned_storedi patterns unused, so we can remove them. > > This patch fixes the ICe in gcc.target/aarch64/advsimd-intrinsics/vldX.c seen with > -mthumb -mcpu=cortex-a15 -mfpu=neon-vfpv4 -mfloat-abi=hard -mfp16-format=ieee > so no new testcase is added. > > Bootstrapped and tested on arm-none-linux-gnueabihf. > > Ok for trunk? > > Thanks, > Kyrill > > 2015-11-10 Kyrylo Tkachov > > PR target/68149 > * config/arm/arm.md (unaligned_loaddi): Delete. > (unaligned_storedi): Likewise. > * config/arm/arm.c (gen_movmem_ldrd_strd): Don't generate > unaligned DImode memory ops. Instead perform two back-to-back > unalgined SImode ops. s/unalgined/unaligned. Ok. Ramana