From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 130569 invoked by alias); 3 Dec 2015 11:08:47 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 130529 invoked by uid 89); 3 Dec 2015 11:08:47 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.8 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,T_RP_MATCHES_RCVD autolearn=no version=3.3.2 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 03 Dec 2015 11:08:46 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 81AC1491; Thu, 3 Dec 2015 03:08:24 -0800 (PST) Received: from e105689-lin.cambridge.arm.com (e105689-lin.cambridge.arm.com [10.2.207.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D02003F4FF; Thu, 3 Dec 2015 03:08:43 -0800 (PST) Subject: Re: [ARM] Fix PR middle-end/65958 To: Eric Botcazou References: <1478566.ZKXszbaoG4@polaris> <9319219.YanzbaT3s8@polaris> <5638F077.5050105@foss.arm.com> <11225412.5B49tQ9fvN@polaris> Cc: gcc-patches@gcc.gnu.org, Ramana Radhakrishnan From: Richard Earnshaw X-Enigmail-Draft-Status: N1110 Message-ID: <566022BA.4080709@foss.arm.com> Date: Thu, 03 Dec 2015 11:08:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <11225412.5B49tQ9fvN@polaris> Content-Type: text/plain; charset=iso-8859-15 Content-Transfer-Encoding: 8bit X-IsSubscribed: yes X-SW-Source: 2015-12/txt/msg00418.txt.bz2 Sorry for the delay, very busy on other things these days... On 16/11/15 20:00, Eric Botcazou wrote: >> More comments inline. > > Revised version attached, which addresses all your comments and in particular > removes the > > +#if PROBE_INTERVAL > 4096 > +#error Cannot use indexed addressing mode for stack probing > +#endif > > compile-time assertion. It generates the same code for PROBE_INTERVAL == 4096 > as before and it generates code that can be assembled for 8192. > > Tested on Aarch64/Linux, OK for the mainline? > > +#define PROBE_INTERVAL (1 << STACK_CHECK_PROBE_INTERVAL_EXP) > + > +/* We use the 12-bit shifted immediate arithmetic instructions so values > + must be multiple of (1 << 12), i.e. 4096. */ > +#if (PROBE_INTERVAL % 4096) != 0 I can understand this restriction, but... > + /* See the same assertion on PROBE_INTERVAL above. */ > + gcc_assert ((first % 4096) == 0); ... why isn't this a test that FIRST is aligned to PROBE_INTERVAL? > + /* See if we have a constant small number of probes to generate. If so, > + that's the easy case. */ > + if (size <= PROBE_INTERVAL) > + { > + const HOST_WIDE_INT base = ROUND_UP (size, 4096); > + emit_set_insn (reg1, blank line between declarations and code. Also, can we come up with a suitable define for 4096 here that expresses the context and then use that consistently through the remainder of this function? > +(define_insn "probe_stack_range" > + [(set (match_operand:DI 0 "register_operand" "=r") > + (unspec_volatile:DI [(match_operand:DI 1 "register_operand" "0") > + (match_operand:DI 2 "register_operand" "r")] > + UNSPEC_PROBE_STACK_RANGE))] I think this should really use PTRmode, so that it's ILP32 ready (I'm not going to ask you to make sure that works though, since I suspect there are still other issues to resolve with ILP32 at this time). R.