* RE: [PATCH 4/4][AArch64] Cost CCMP instruction sequences to choose better expand order
@ 2015-12-15 10:33 Wilco Dijkstra
2015-12-15 17:30 ` [PATCH 4/4] " Jiong Wang
2016-01-19 15:49 ` [PATCH 4/4][AArch64] " H.J. Lu
0 siblings, 2 replies; 6+ messages in thread
From: Wilco Dijkstra @ 2015-12-15 10:33 UTC (permalink / raw)
To: James Greenhalgh; +Cc: gcc-patches, nd
ping
> -----Original Message-----
> From: Wilco Dijkstra [mailto:Wilco.Dijkstra@arm.com]
> Sent: 13 November 2015 16:03
> To: 'gcc-patches@gcc.gnu.org'
> Subject: [PATCH 4/4][AArch64] Cost CCMP instruction sequences to choose better expand order
>
> This patch adds CCMP selection based on rtx costs. This is based on Jiong's already approved patch https://gcc.gnu.org/ml/gcc-
> patches/2015-09/msg01434.html with some minor refactoring and the tests updated.
>
> OK for commit?
>
> ChangeLog:
> 2015-11-13 Jiong Wang <jiong.wang@arm.com>
>
> gcc/
> * ccmp.c (expand_ccmp_expr_1): Cost the instruction sequences
> generated from different expand order.
>
> gcc/testsuite/
> * gcc.target/aarch64/ccmp_1.c: Update test.
>
> ---
> gcc/ccmp.c | 47 +++++++++++++++++++++++++++----
> gcc/testsuite/gcc.target/aarch64/ccmp_1.c | 15 ++++++++--
> 2 files changed, 55 insertions(+), 7 deletions(-)
>
> diff --git a/gcc/ccmp.c b/gcc/ccmp.c
> index cbdbd6d..95a41a6 100644
> --- a/gcc/ccmp.c
> +++ b/gcc/ccmp.c
> @@ -51,6 +51,7 @@ along with GCC; see the file COPYING3. If not see
> #include "tree-outof-ssa.h"
> #include "cfgexpand.h"
> #include "ccmp.h"
> +#include "predict.h"
>
> /* The following functions expand conditional compare (CCMP) instructions.
> Here is a short description about the over all algorithm:
> @@ -159,6 +160,8 @@ expand_ccmp_next (gimple *g, enum tree_code code, rtx prev,
> static rtx
> expand_ccmp_expr_1 (gimple *g, rtx *prep_seq, rtx *gen_seq)
> {
> + rtx prep_seq_1, gen_seq_1;
> + rtx prep_seq_2, gen_seq_2;
> tree exp = gimple_assign_rhs_to_tree (g);
> enum tree_code code = TREE_CODE (exp);
> gimple *gs0 = get_gimple_for_ssa_name (TREE_OPERAND (exp, 0));
> @@ -174,19 +177,53 @@ expand_ccmp_expr_1 (gimple *g, rtx *prep_seq, rtx *gen_seq)
> {
> if (TREE_CODE_CLASS (code1) == tcc_comparison)
> {
> - int unsignedp0;
> - enum rtx_code rcode0;
> + int unsignedp0, unsignedp1;
> + enum rtx_code rcode0, rcode1;
> + int speed_p = optimize_insn_for_speed_p ();
> + rtx tmp2, ret, ret2;
> + unsigned cost1 = MAX_COST;
> + unsigned cost2 = MAX_COST;
>
> unsignedp0 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (gs0)));
> + unsignedp1 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (gs1)));
> rcode0 = get_rtx_code (code0, unsignedp0);
> + rcode1 = get_rtx_code (code1, unsignedp1);
>
> - tmp = targetm.gen_ccmp_first (prep_seq, gen_seq, rcode0,
> + tmp = targetm.gen_ccmp_first (&prep_seq_1, &gen_seq_1, rcode0,
> gimple_assign_rhs1 (gs0),
> gimple_assign_rhs2 (gs0));
> - if (!tmp)
> +
> + tmp2 = targetm.gen_ccmp_first (&prep_seq_2, &gen_seq_2, rcode1,
> + gimple_assign_rhs1 (gs1),
> + gimple_assign_rhs2 (gs1));
> +
> + if (!tmp && !tmp2)
> return NULL_RTX;
>
> - return expand_ccmp_next (gs1, code, tmp, prep_seq, gen_seq);
> + if (tmp != NULL)
> + {
> + ret = expand_ccmp_next (gs1, code, tmp, &prep_seq_1, &gen_seq_1);
> + cost1 = seq_cost (safe_as_a <rtx_insn *> (prep_seq_1), speed_p);
> + cost1 += seq_cost (safe_as_a <rtx_insn *> (gen_seq_1), speed_p);
> + }
> + if (tmp2 != NULL)
> + {
> + ret2 = expand_ccmp_next (gs0, code, tmp2, &prep_seq_2,
> + &gen_seq_2);
> + cost2 = seq_cost (safe_as_a <rtx_insn *> (prep_seq_2), speed_p);
> + cost2 += seq_cost (safe_as_a <rtx_insn *> (gen_seq_2), speed_p);
> + }
> +
> + if (cost2 < cost1)
> + {
> + *prep_seq = prep_seq_2;
> + *gen_seq = gen_seq_2;
> + return ret2;
> + }
> +
> + *prep_seq = prep_seq_1;
> + *gen_seq = gen_seq_1;
> + return ret;
> }
> else
> {
> diff --git a/gcc/testsuite/gcc.target/aarch64/ccmp_1.c b/gcc/testsuite/gcc.target/aarch64/ccmp_1.c
> index ef077e0..7c39b61 100644
> --- a/gcc/testsuite/gcc.target/aarch64/ccmp_1.c
> +++ b/gcc/testsuite/gcc.target/aarch64/ccmp_1.c
> @@ -80,5 +80,16 @@ f13 (int a, int b)
> return a == 3 || a == 0;
> }
>
> -/* { dg-final { scan-assembler "fccmp\t" } } */
> -/* { dg-final { scan-assembler "fccmpe\t" } } */
> +/* { dg-final { scan-assembler "cmp\t(.)+32" } } */
> +/* { dg-final { scan-assembler "cmp\t(.)+33" } } */
> +/* { dg-final { scan-assembler "cmp\t(.)+34" } } */
> +/* { dg-final { scan-assembler "cmp\t(.)+35" } } */
> +
> +/* { dg-final { scan-assembler-times "\tcmp\tw\[0-9\]+, 0" 4 } } */
> +/* { dg-final { scan-assembler-times "fcmpe\t(.)+0\\.0" 2 } } */
> +/* { dg-final { scan-assembler-times "fcmp\t(.)+0\\.0" 2 } } */
> +
> +/* { dg-final { scan-assembler "adds\t" } } */
> +/* { dg-final { scan-assembler-times "\tccmp\t" 11 } } */
> +/* { dg-final { scan-assembler-times "fccmp\t.*0\\.0" 1 } } */
> +/* { dg-final { scan-assembler-times "fccmpe\t.*0\\.0" 1 } } */
> --
> 1.9.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 4/4] Cost CCMP instruction sequences to choose better expand order
2015-12-15 10:33 [PATCH 4/4][AArch64] Cost CCMP instruction sequences to choose better expand order Wilco Dijkstra
@ 2015-12-15 17:30 ` Jiong Wang
2015-12-15 23:49 ` Bernd Schmidt
2016-01-19 15:49 ` [PATCH 4/4][AArch64] " H.J. Lu
1 sibling, 1 reply; 6+ messages in thread
From: Jiong Wang @ 2015-12-15 17:30 UTC (permalink / raw)
To: Bernd Schmidt; +Cc: Wilco Dijkstra, James Greenhalgh, gcc-patches
On 15/12/15 10:33, Wilco Dijkstra wrote:
>> -----Original Message-----
>> From: Wilco Dijkstra [mailto:Wilco.Dijkstra@arm.com]
>> Sent: 13 November 2015 16:03
>> To: 'gcc-patches@gcc.gnu.org'
>> Subject: [PATCH 4/4][AArch64] Cost CCMP instruction sequences to choose better expand order
>>
>> This patch adds CCMP selection based on rtx costs. This is based on Jiong's already approved patch https://gcc.gnu.org/ml/gcc-
>> patches/2015-09/msg01434.html with some minor refactoring and the tests updated.
>>
>> OK for commit?
>>
>> ChangeLog:
>> 2015-11-13 Jiong Wang <jiong.wang@arm.com>
>>
>> gcc/
>> * ccmp.c (expand_ccmp_expr_1): Cost the instruction sequences
>> generated from different expand order.
>>
>> gcc/testsuite/
>> * gcc.target/aarch64/ccmp_1.c: Update test.
Hi Bernd,
You approved this patch at
https://gcc.gnu.org/ml/gcc-patches/2015-09/msg01722.html
under the condition that AArch64 cost on ccmp instruction should be
fixed first.
Wilco has fixed the cost issue in this patch set [3/4], and the
"XFAIL" removed also.
I just want to confirm that this patch is still OK to commit after
boostrap and
regression OK, right?
Thanks.
>>
>> ---
>> gcc/ccmp.c | 47 +++++++++++++++++++++++++++----
>> gcc/testsuite/gcc.target/aarch64/ccmp_1.c | 15 ++++++++--
>> 2 files changed, 55 insertions(+), 7 deletions(-)
>>
>> diff --git a/gcc/ccmp.c b/gcc/ccmp.c
>> index cbdbd6d..95a41a6 100644
>> --- a/gcc/ccmp.c
>> +++ b/gcc/ccmp.c
>> @@ -51,6 +51,7 @@ along with GCC; see the file COPYING3. If not see
>> #include "tree-outof-ssa.h"
>> #include "cfgexpand.h"
>> #include "ccmp.h"
>> +#include "predict.h"
>>
>> /* The following functions expand conditional compare (CCMP) instructions.
>> Here is a short description about the over all algorithm:
>> @@ -159,6 +160,8 @@ expand_ccmp_next (gimple *g, enum tree_code code, rtx prev,
>> static rtx
>> expand_ccmp_expr_1 (gimple *g, rtx *prep_seq, rtx *gen_seq)
>> {
>> + rtx prep_seq_1, gen_seq_1;
>> + rtx prep_seq_2, gen_seq_2;
>> tree exp = gimple_assign_rhs_to_tree (g);
>> enum tree_code code = TREE_CODE (exp);
>> gimple *gs0 = get_gimple_for_ssa_name (TREE_OPERAND (exp, 0));
>> @@ -174,19 +177,53 @@ expand_ccmp_expr_1 (gimple *g, rtx *prep_seq, rtx *gen_seq)
>> {
>> if (TREE_CODE_CLASS (code1) == tcc_comparison)
>> {
>> - int unsignedp0;
>> - enum rtx_code rcode0;
>> + int unsignedp0, unsignedp1;
>> + enum rtx_code rcode0, rcode1;
>> + int speed_p = optimize_insn_for_speed_p ();
>> + rtx tmp2, ret, ret2;
>> + unsigned cost1 = MAX_COST;
>> + unsigned cost2 = MAX_COST;
>>
>> unsignedp0 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (gs0)));
>> + unsignedp1 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (gs1)));
>> rcode0 = get_rtx_code (code0, unsignedp0);
>> + rcode1 = get_rtx_code (code1, unsignedp1);
>>
>> - tmp = targetm.gen_ccmp_first (prep_seq, gen_seq, rcode0,
>> + tmp = targetm.gen_ccmp_first (&prep_seq_1, &gen_seq_1, rcode0,
>> gimple_assign_rhs1 (gs0),
>> gimple_assign_rhs2 (gs0));
>> - if (!tmp)
>> +
>> + tmp2 = targetm.gen_ccmp_first (&prep_seq_2, &gen_seq_2, rcode1,
>> + gimple_assign_rhs1 (gs1),
>> + gimple_assign_rhs2 (gs1));
>> +
>> + if (!tmp && !tmp2)
>> return NULL_RTX;
>>
>> - return expand_ccmp_next (gs1, code, tmp, prep_seq, gen_seq);
>> + if (tmp != NULL)
>> + {
>> + ret = expand_ccmp_next (gs1, code, tmp, &prep_seq_1, &gen_seq_1);
>> + cost1 = seq_cost (safe_as_a <rtx_insn *> (prep_seq_1), speed_p);
>> + cost1 += seq_cost (safe_as_a <rtx_insn *> (gen_seq_1), speed_p);
>> + }
>> + if (tmp2 != NULL)
>> + {
>> + ret2 = expand_ccmp_next (gs0, code, tmp2, &prep_seq_2,
>> + &gen_seq_2);
>> + cost2 = seq_cost (safe_as_a <rtx_insn *> (prep_seq_2), speed_p);
>> + cost2 += seq_cost (safe_as_a <rtx_insn *> (gen_seq_2), speed_p);
>> + }
>> +
>> + if (cost2 < cost1)
>> + {
>> + *prep_seq = prep_seq_2;
>> + *gen_seq = gen_seq_2;
>> + return ret2;
>> + }
>> +
>> + *prep_seq = prep_seq_1;
>> + *gen_seq = gen_seq_1;
>> + return ret;
>> }
>> else
>> {
>> diff --git a/gcc/testsuite/gcc.target/aarch64/ccmp_1.c b/gcc/testsuite/gcc.target/aarch64/ccmp_1.c
>> index ef077e0..7c39b61 100644
>> --- a/gcc/testsuite/gcc.target/aarch64/ccmp_1.c
>> +++ b/gcc/testsuite/gcc.target/aarch64/ccmp_1.c
>> @@ -80,5 +80,16 @@ f13 (int a, int b)
>> return a == 3 || a == 0;
>> }
>>
>> -/* { dg-final { scan-assembler "fccmp\t" } } */
>> -/* { dg-final { scan-assembler "fccmpe\t" } } */
>> +/* { dg-final { scan-assembler "cmp\t(.)+32" } } */
>> +/* { dg-final { scan-assembler "cmp\t(.)+33" } } */
>> +/* { dg-final { scan-assembler "cmp\t(.)+34" } } */
>> +/* { dg-final { scan-assembler "cmp\t(.)+35" } } */
>> +
>> +/* { dg-final { scan-assembler-times "\tcmp\tw\[0-9\]+, 0" 4 } } */
>> +/* { dg-final { scan-assembler-times "fcmpe\t(.)+0\\.0" 2 } } */
>> +/* { dg-final { scan-assembler-times "fcmp\t(.)+0\\.0" 2 } } */
>> +
>> +/* { dg-final { scan-assembler "adds\t" } } */
>> +/* { dg-final { scan-assembler-times "\tccmp\t" 11 } } */
>> +/* { dg-final { scan-assembler-times "fccmp\t.*0\\.0" 1 } } */
>> +/* { dg-final { scan-assembler-times "fccmpe\t.*0\\.0" 1 } } */
>> --
>> 1.9.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 4/4][AArch64] Cost CCMP instruction sequences to choose better expand order
2015-12-15 10:33 [PATCH 4/4][AArch64] Cost CCMP instruction sequences to choose better expand order Wilco Dijkstra
2015-12-15 17:30 ` [PATCH 4/4] " Jiong Wang
@ 2016-01-19 15:49 ` H.J. Lu
2016-01-19 16:42 ` Wilco Dijkstra
2016-01-19 18:15 ` Wilco Dijkstra
1 sibling, 2 replies; 6+ messages in thread
From: H.J. Lu @ 2016-01-19 15:49 UTC (permalink / raw)
To: Wilco Dijkstra; +Cc: James Greenhalgh, gcc-patches, nd
On Tue, Dec 15, 2015 at 2:33 AM, Wilco Dijkstra <Wilco.Dijkstra@arm.com> wrote:
> ping
>
>> -----Original Message-----
>> From: Wilco Dijkstra [mailto:Wilco.Dijkstra@arm.com]
>> Sent: 13 November 2015 16:03
>> To: 'gcc-patches@gcc.gnu.org'
>> Subject: [PATCH 4/4][AArch64] Cost CCMP instruction sequences to choose better expand order
>>
>> This patch adds CCMP selection based on rtx costs. This is based on Jiong's already approved patch https://gcc.gnu.org/ml/gcc-
>> patches/2015-09/msg01434.html with some minor refactoring and the tests updated.
>>
>> OK for commit?
>>
>> ChangeLog:
>> 2015-11-13 Jiong Wang <jiong.wang@arm.com>
>>
>> gcc/
>> * ccmp.c (expand_ccmp_expr_1): Cost the instruction sequences
>> generated from different expand order.
>>
It breaks bootstrap on Linux/x86:
https://gcc.gnu.org/ml/gcc-regression/2016-01/msg00332.html
-- ../../src-trunk/gcc/ccmp.c: In function ârtx_def*
expand_ccmp_expr_1(gimple*, rtx_def**, rtx_def**)â:
../../src-trunk/gcc/ccmp.c:173:14: error: âretâ may be used
uninitialized in this function [-Werror=maybe-uninitialized]
rtx tmp2, ret, ret2;
^~~
cc1plus: all warnings being treated as errors
Makefile:1085: recipe for target 'ccmp.o' failed
make[6]: *** [ccmp.o] Error 1
H.J.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 4/4][AArch64] Cost CCMP instruction sequences to choose better expand order
2016-01-19 15:49 ` [PATCH 4/4][AArch64] " H.J. Lu
@ 2016-01-19 16:42 ` Wilco Dijkstra
2016-01-19 18:15 ` Wilco Dijkstra
1 sibling, 0 replies; 6+ messages in thread
From: Wilco Dijkstra @ 2016-01-19 16:42 UTC (permalink / raw)
To: H.J. Lu; +Cc: James Greenhalgh, gcc-patches, nd
H.J. Lu <hjl.tools@gmail.com> wrote:
> It breaks bootstrap on Linux/x86:
Sorry about that - it looks like the warning levels seem to have changed since that patch was tested...
I have a trivial fix which I'll get checked in soon.
Wilco
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 4/4][AArch64] Cost CCMP instruction sequences to choose better expand order
2016-01-19 15:49 ` [PATCH 4/4][AArch64] " H.J. Lu
2016-01-19 16:42 ` Wilco Dijkstra
@ 2016-01-19 18:15 ` Wilco Dijkstra
1 sibling, 0 replies; 6+ messages in thread
From: Wilco Dijkstra @ 2016-01-19 18:15 UTC (permalink / raw)
To: H.J. Lu; +Cc: gcc-patches, nd
H.J. Lu <hjl.tools@gmail.com> wrote:
> It breaks bootstrap on Linux/x86:
Committed trivial fix as r232576:
Index: gcc/ChangeLog
===================================================================
--- gcc/ChangeLog (revision 232575)
+++ gcc/ChangeLog (working copy)
@@ -1,3 +1,7 @@
+2016-01-19 Wilco Dijkstra <wdijkstr@arm.com>
+
+ * ccmp.c (expand_ccmp_expr_1): Avoid spurious unused warnings.
+
2016-01-19 Jan Hubicka <hubicka@ucw.cz>
PR ipa/66223
Index: gcc/ccmp.c
===================================================================
--- gcc/ccmp.c (revision 232575)
+++ gcc/ccmp.c (working copy)
@@ -170,7 +170,7 @@
int unsignedp0, unsignedp1;
rtx_code rcode0, rcode1;
int speed_p = optimize_insn_for_speed_p ();
- rtx tmp2, ret, ret2;
+ rtx tmp2, ret = NULL_RTX, ret2 = NULL_RTX;
unsigned cost1 = MAX_COST;
unsigned cost2 = MAX_COST;
^ permalink raw reply [flat|nested] 6+ messages in thread
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2015-12-15 10:33 [PATCH 4/4][AArch64] Cost CCMP instruction sequences to choose better expand order Wilco Dijkstra
2015-12-15 17:30 ` [PATCH 4/4] " Jiong Wang
2015-12-15 23:49 ` Bernd Schmidt
2016-01-19 15:49 ` [PATCH 4/4][AArch64] " H.J. Lu
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