From: Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>
To: James Greenhalgh <james.greenhalgh@arm.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
Marcus Shawcroft <marcus.shawcroft@arm.com>,
Richard Earnshaw <Richard.Earnshaw@arm.com>
Subject: Re: [PATCH][AArch64][1/2] PR rtl-optimization/68796 Add compare-of-zero_extract pattern
Date: Fri, 18 Dec 2015 09:53:00 -0000 [thread overview]
Message-ID: <5673D783.9050704@foss.arm.com> (raw)
In-Reply-To: <20151217172420.GA40748@arm.com>
[-- Attachment #1: Type: text/plain, Size: 3423 bytes --]
On 17/12/15 17:24, James Greenhalgh wrote:
> On Thu, Dec 17, 2015 at 03:36:40PM +0000, Kyrill Tkachov wrote:
>> 2015-12-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
>>
>> PR rtl-optimization/68796
>> * config/aarch64/aarch64.md (*and<mode>3nr_compare0_zextract):
>> New pattern.
>> * config/aarch64/aarch64.c (aarch64_select_cc_mode): Handle
>> ZERO_EXTRACT comparison with zero.
>> (aarch64_mask_from_zextract_ops): New function.
>> * config/aarch64/aarch64-protos.h (aarch64_mask_from_zextract_ops):
>> New prototype.
>>
>> 2015-12-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
>>
>> PR rtl-optimization/68796
>> * gcc.target/aarch64/tst_3.c: New test.
>> * gcc.target/aarch64/tst_4.c: Likewise.
> Two comments.
>
>> diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
>> index 87d6eb1358845527d7068550925949802a7e48e2..febca98d38d5f09c97b0f79adc55bb29eca217b9 100644
>> --- a/gcc/config/aarch64/aarch64-protos.h
>> +++ b/gcc/config/aarch64/aarch64-protos.h
>> @@ -330,6 +330,7 @@ int aarch64_uxt_size (int, HOST_WIDE_INT);
>> int aarch64_vec_fpconst_pow_of_2 (rtx);
>> rtx aarch64_final_eh_return_addr (void);
>> rtx aarch64_legitimize_reload_address (rtx *, machine_mode, int, int, int);
>> +rtx aarch64_mask_from_zextract_ops (rtx, rtx);
>> const char *aarch64_output_move_struct (rtx *operands);
>> rtx aarch64_return_addr (int, rtx);
>> rtx aarch64_simd_gen_const_vector_dup (machine_mode, int);
>> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
>> index cb8955d5d6c909e8179bb1ab8203eb165f55e4b6..58a9fc68f391162ed9847d7fb79d70d3ee9919f5 100644
>> --- a/gcc/config/aarch64/aarch64.c
>> +++ b/gcc/config/aarch64/aarch64.c
>> @@ -4147,7 +4147,9 @@ aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y)
>> && y == const0_rtx
>> && (code == EQ || code == NE || code == LT || code == GE)
>> && (GET_CODE (x) == PLUS || GET_CODE (x) == MINUS || GET_CODE (x) == AND
>> - || GET_CODE (x) == NEG))
>> + || GET_CODE (x) == NEG
>> + || (GET_CODE (x) == ZERO_EXTRACT && CONST_INT_P (XEXP (x, 1))
>> + && CONST_INT_P (XEXP (x, 2)))))
>> return CC_NZmode;
>>
>> /* A compare with a shifted operand. Because of canonicalization,
>> @@ -10757,6 +10759,21 @@ aarch64_simd_imm_zero_p (rtx x, machine_mode mode)
>> return x == CONST0_RTX (mode);
>> }
>>
>> +
>> +/* Return the bitmask CONST_INT to select the bits required by a zero extract
>> + operation of width WIDTH at bit position POS. */
>> +
>> +rtx
>> +aarch64_mask_from_zextract_ops (rtx width, rtx pos)
>> +{
> It is up to you, but would this not more naturally be:
>
> unsigned HOST_WIDE_INT
> aarch64_mask_from_zextract_ops (rtx width, rtx pos)
>
> Given how it gets used elsewhere?
>
>> + gcc_assert (CONST_INT_P (width));
>> + gcc_assert (CONST_INT_P (pos));
>> +
>> + unsigned HOST_WIDE_INT mask
>> + = ((unsigned HOST_WIDE_INT)1 << UINTVAL (width)) - 1;
> Space between (unsigned HOST_WIDE_INT) and 1.
>
>> + return GEN_INT (mask << UINTVAL (pos));
>> +}
>> +
>> bool
>> aarch64_simd_imm_scalar_p (rtx x, machine_mode mode ATTRIBUTE_UNUSED)
>> {
> Otherwise, this is OK.
Thanks, I've chosen to keep the return type of aarch64_mask_from_zextract_ops as rtx
and fixed the whitespace. I'm committing this version to trunk.
Thanks,
Kyrill
> Thanks,
> James
>
[-- Attachment #2: aarch64-compare-zextract.patch --]
[-- Type: text/x-patch, Size: 4139 bytes --]
diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index 87d6eb1358845527d7068550925949802a7e48e2..febca98d38d5f09c97b0f79adc55bb29eca217b9 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -330,6 +330,7 @@ int aarch64_uxt_size (int, HOST_WIDE_INT);
int aarch64_vec_fpconst_pow_of_2 (rtx);
rtx aarch64_final_eh_return_addr (void);
rtx aarch64_legitimize_reload_address (rtx *, machine_mode, int, int, int);
+rtx aarch64_mask_from_zextract_ops (rtx, rtx);
const char *aarch64_output_move_struct (rtx *operands);
rtx aarch64_return_addr (int, rtx);
rtx aarch64_simd_gen_const_vector_dup (machine_mode, int);
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 474dca4f4b98179b64cfc29aa689d71363c736cd..a174a4c2f12acc2b0558782798312dfa17cdf5d5 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -4147,7 +4147,9 @@ aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y)
&& y == const0_rtx
&& (code == EQ || code == NE || code == LT || code == GE)
&& (GET_CODE (x) == PLUS || GET_CODE (x) == MINUS || GET_CODE (x) == AND
- || GET_CODE (x) == NEG))
+ || GET_CODE (x) == NEG
+ || (GET_CODE (x) == ZERO_EXTRACT && CONST_INT_P (XEXP (x, 1))
+ && CONST_INT_P (XEXP (x, 2)))))
return CC_NZmode;
/* A compare with a shifted operand. Because of canonicalization,
@@ -10759,6 +10761,21 @@ aarch64_simd_imm_zero_p (rtx x, machine_mode mode)
return x == CONST0_RTX (mode);
}
+
+/* Return the bitmask CONST_INT to select the bits required by a zero extract
+ operation of width WIDTH at bit position POS. */
+
+rtx
+aarch64_mask_from_zextract_ops (rtx width, rtx pos)
+{
+ gcc_assert (CONST_INT_P (width));
+ gcc_assert (CONST_INT_P (pos));
+
+ unsigned HOST_WIDE_INT mask
+ = ((unsigned HOST_WIDE_INT) 1 << UINTVAL (width)) - 1;
+ return GEN_INT (mask << UINTVAL (pos));
+}
+
bool
aarch64_simd_imm_scalar_p (rtx x, machine_mode mode ATTRIBUTE_UNUSED)
{
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 4604fd2588be87944a72224dccb3dfb32e42a1ad..fd2b3ef64f1736545948eb49e5ac6dfbd206e3e9 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3698,6 +3698,28 @@ (define_insn "*and<mode>3nr_compare0"
[(set_attr "type" "logics_reg,logics_imm")]
)
+(define_insn "*and<mode>3nr_compare0_zextract"
+ [(set (reg:CC_NZ CC_REGNUM)
+ (compare:CC_NZ
+ (zero_extract:GPI (match_operand:GPI 0 "register_operand" "r")
+ (match_operand:GPI 1 "const_int_operand" "n")
+ (match_operand:GPI 2 "const_int_operand" "n"))
+ (const_int 0)))]
+ "INTVAL (operands[1]) > 0
+ && ((INTVAL (operands[1]) + INTVAL (operands[2]))
+ <= GET_MODE_BITSIZE (<MODE>mode))
+ && aarch64_bitmask_imm (
+ UINTVAL (aarch64_mask_from_zextract_ops (operands[1],
+ operands[2])),
+ <MODE>mode)"
+ {
+ operands[1]
+ = aarch64_mask_from_zextract_ops (operands[1], operands[2]);
+ return "tst\\t%<w>0, %1";
+ }
+ [(set_attr "type" "logics_shift_imm")]
+)
+
(define_insn "*and_<SHIFT:optab><mode>3nr_compare0"
[(set (reg:CC_NZ CC_REGNUM)
(compare:CC_NZ
diff --git a/gcc/testsuite/gcc.target/aarch64/tst_3.c b/gcc/testsuite/gcc.target/aarch64/tst_3.c
new file mode 100644
index 0000000000000000000000000000000000000000..2204b33f3bc2ea974b3b0a7d1a5bdca7c6b37b82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/tst_3.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int
+f1 (int x)
+{
+ if (x & 1)
+ return 1;
+ return x;
+}
+
+/* { dg-final { scan-assembler "tst\t(x|w)\[0-9\]*.*1" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/tst_4.c b/gcc/testsuite/gcc.target/aarch64/tst_4.c
new file mode 100644
index 0000000000000000000000000000000000000000..2b869c05c87ec120e1632a1420349a5eb98ff895
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/tst_4.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int
+f1 (long x)
+{
+ return ((short) x >= 0) ? x : 0;
+}
+
+/* { dg-final { scan-assembler "tst\t(x|w)\[0-9\]*.*32768\n" } } */
prev parent reply other threads:[~2015-12-18 9:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-17 15:36 Kyrill Tkachov
2015-12-17 17:24 ` James Greenhalgh
2015-12-17 17:38 ` Kyrill Tkachov
2015-12-18 9:53 ` Kyrill Tkachov [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5673D783.9050704@foss.arm.com \
--to=kyrylo.tkachov@foss.arm.com \
--cc=Richard.Earnshaw@arm.com \
--cc=gcc-patches@gcc.gnu.org \
--cc=james.greenhalgh@arm.com \
--cc=marcus.shawcroft@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).