From: Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>
To: Segher Boessenkool <segher@kernel.crashing.org>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>
Subject: Re: [PATCH][combine] Check WORD_REGISTER_OPERATIONS normally rather than through preprocessor
Date: Tue, 22 Dec 2015 10:39:00 -0000 [thread overview]
Message-ID: <5679285C.5020809@foss.arm.com> (raw)
In-Reply-To: <20151217144935.GA11032@gate.crashing.org>
[-- Attachment #1: Type: text/plain, Size: 1597 bytes --]
On 17/12/15 14:49, Segher Boessenkool wrote:
> Hi Kyrill,
>
> On Tue, Dec 15, 2015 at 05:07:41PM +0000, Kyrill Tkachov wrote:
>> As part of the war on conditional compilation here's an #if check on
>> WORD_REGISTER_OPERATIONS that
>> seems to have been missed out.
>>
>> Bootstrapped and tested on arm, aarch64, x86_64.
>>
>> Is it still ok to commit these kinds of conditional compilation conversions?
> You could say it is a bugfix, a missed case in the conversion ;-)
>
>> diff --git a/gcc/combine.c b/gcc/combine.c
>> index 8601d8983ce345e2129dd047b3520d98c0582842..0658a6dbc6df6862df662bc7842c13ed06b36b04 100644
>> --- a/gcc/combine.c
>> +++ b/gcc/combine.c
>> @@ -11488,10 +11488,10 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
>> /* Try a few ways of applying the same transformation to both operands. */
>> while (1)
>> {
>> -#if !WORD_REGISTER_OPERATIONS
>> /* The test below this one won't handle SIGN_EXTENDs on these machines,
>> so check specially. */
>> - if (code != GTU && code != GEU && code != LTU && code != LEU
>> + if (!WORD_REGISTER_OPERATIONS && code != GTU && code != GEU
>> + && code != LTU && code != LEU
> Please keep all the code != together, i.e.
>
> + if (!WORD_REGISTER_OPERATIONS
> + && code != GTU && code != GEU && code != LTU && code != LEU
>
> Okay with that change.
Thanks.
Here's what I'll be committing.
Kyrill
2015-12-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* combine.c (simplify_comparison): Convert preprocessor check of
WORD_REGISTER_OPERATIONS into runtime check.
[-- Attachment #2: combine-word-regs.patch --]
[-- Type: text/x-patch, Size: 1172 bytes --]
diff --git a/gcc/combine.c b/gcc/combine.c
index dc0d4bd52c717b88608d21dbaffe444eeb68bb2d..36ea6df15010247c96a9fcac1649d3d958d64675 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -11436,10 +11436,10 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
/* Try a few ways of applying the same transformation to both operands. */
while (1)
{
-#if !WORD_REGISTER_OPERATIONS
/* The test below this one won't handle SIGN_EXTENDs on these machines,
so check specially. */
- if (code != GTU && code != GEU && code != LTU && code != LEU
+ if (!WORD_REGISTER_OPERATIONS
+ && code != GTU && code != GEU && code != LTU && code != LEU
&& GET_CODE (op0) == ASHIFTRT && GET_CODE (op1) == ASHIFTRT
&& GET_CODE (XEXP (op0, 0)) == ASHIFT
&& GET_CODE (XEXP (op1, 0)) == ASHIFT
@@ -11459,7 +11459,6 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
op0 = SUBREG_REG (XEXP (XEXP (op0, 0), 0));
op1 = SUBREG_REG (XEXP (XEXP (op1, 0), 0));
}
-#endif
/* If both operands are the same constant shift, see if we can ignore the
shift. We can if the shift is a rotate or if the bits shifted out of
next prev parent reply other threads:[~2015-12-22 10:39 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-15 17:07 Kyrill Tkachov
2015-12-17 14:49 ` Segher Boessenkool
2015-12-22 10:39 ` Kyrill Tkachov [this message]
2016-04-17 21:25 ` Jeff Law
2016-04-18 9:33 ` Kyrill Tkachov
2016-04-21 11:37 ` Jeff Law
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