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* patch to fix PR68990
@ 2016-01-21 16:02 Vladimir Makarov
  0 siblings, 0 replies; only message in thread
From: Vladimir Makarov @ 2016-01-21 16:02 UTC (permalink / raw)
  To: gcc-patches

[-- Attachment #1: Type: text/plain, Size: 453 bytes --]

   The following patch fixes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68990

   The patch was successfully bootstrapped and tested on x86 and 
x86-64.  The patch was also checked on x86-64 SPECFP2000.  The only 
changed code was for fma3d.  There was no visible change in fm3d 
performance.

   Committed as r232679.sy

P.S.  I believe it also fixes PR69377.  It seems that x86 with 
-march=x86-64 stresses RA much and is a good for its testing.



[-- Attachment #2: pr68990.patch --]
[-- Type: text/x-patch, Size: 4150 bytes --]

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 232571)
+++ ChangeLog	(working copy)
@@ -1,3 +1,9 @@
+2016-01-21  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/68990
+	* lra-coalesce.c (lra_coalesce): Invalidate value for the result
+	pseudo instead of inheritance ones.
+
 2016-01-19  Richard Biener  <rguenther@suse.de>
 
 	* hsa-gen.c (get_memory_order_name): Use MEMMODEL_ constants.
Index: lra-coalesce.c
===================================================================
--- lra-coalesce.c	(revision 232571)
+++ lra-coalesce.c	(working copy)
@@ -224,13 +224,10 @@ lra_coalesce (void)
   rtx_insn *mv, *insn, *next, **sorted_moves;
   rtx set;
   int i, mv_num, sregno, dregno;
-  unsigned int regno;
   int coalesced_moves;
   int max_regno = max_reg_num ();
   bitmap_head involved_insns_bitmap;
-  bitmap_head result_pseudo_vals_bitmap;
-  bitmap_iterator bi;
-
+  
   timevar_push (TV_LRA_COALESCE);
 
   if (lra_dump_file != NULL)
@@ -327,7 +324,7 @@ lra_coalesce (void)
     }
   /* If we have situation after inheritance pass:
 
-     r1 <- ...  insn originally setting p1
+     r1 <- p1   insn originally setting p1
      i1 <- r1   setting inheritance i1 from reload r1
        ...
      ... <- ... p2 ... dead p2
@@ -339,20 +336,18 @@ lra_coalesce (void)
      And we are coalescing p1 and p2 using p1.  In this case i1 and p1
      should have different values, otherwise they can get the same
      hard reg and this is wrong for insn using p2 before coalescing.
-     So invalidate such inheritance pseudo values.  */
-  bitmap_initialize (&result_pseudo_vals_bitmap, &reg_obstack);
-  EXECUTE_IF_SET_IN_BITMAP (&coalesced_pseudos_bitmap, 0, regno, bi)
-    bitmap_set_bit (&result_pseudo_vals_bitmap,
-		    lra_reg_info[first_coalesced_pseudo[regno]].val);
-  EXECUTE_IF_SET_IN_BITMAP (&lra_inheritance_pseudos, 0, regno, bi)
-    if (bitmap_bit_p (&result_pseudo_vals_bitmap, lra_reg_info[regno].val))
+     The situation even can be more complicated when new reload
+     pseudos occur after the inheriatnce.  So invalidate the result
+     pseudos.  */
+  for (i = 0; i < max_regno; i++)
+    if (first_coalesced_pseudo[i] == i
+	&& first_coalesced_pseudo[i] != next_coalesced_pseudo[i])
       {
-	lra_set_regno_unique_value (regno);
+	lra_set_regno_unique_value (i);
 	if (lra_dump_file != NULL)
 	  fprintf (lra_dump_file,
-		   "	 Make unique value for inheritance r%d\n", regno);
+		   "	 Make unique value for coalescing result r%d\n", i);
       }
-  bitmap_clear (&result_pseudo_vals_bitmap);
   bitmap_clear (&used_pseudos_bitmap);
   bitmap_clear (&involved_insns_bitmap);
   bitmap_clear (&coalesced_pseudos_bitmap);
Index: testsuite/ChangeLog
===================================================================
--- testsuite/ChangeLog	(revision 232571)
+++ testsuite/ChangeLog	(working copy)
@@ -1,3 +1,8 @@
+2016-01-21  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/68990
+	* gcc.target/i386/pr68990: New.
+
 2016-01-19  Marek Polacek  <polacek@redhat.com>
 
 	PR c++/68965
Index: testsuite/gcc.target/i386/pr68990.c
===================================================================
--- testsuite/gcc.target/i386/pr68990.c	(revision 0)
+++ testsuite/gcc.target/i386/pr68990.c	(working copy)
@@ -0,0 +1,49 @@
+/* { dg-do compile { target { ia32 } } } */
+/* { dg-options "-O3 -march=x86-64" } */
+/* { dg-final { scan-assembler-not "cmpl\[ \t]+(\[%a-z]+), \\1" } } */
+
+short a;
+int b = 1, f;
+char c, e = 1;
+long long d;
+
+static short
+foo ()
+{
+  unsigned g, h = 0;
+  int i = 0 || d * (b | e);
+  char j = a << i, l = a;
+  short k;
+  int m = -b;
+  if (m < b)
+    {
+      k = m = b;
+      g = (k || l) / (b / e);
+      if (b)
+	__builtin_printf ("foo=%lld\n", (long long) a);
+    }
+  a = b = m;
+  if (j || e)
+    {
+      h = g;
+      i = m;
+      g = j * k / (i - d);
+      if (m)
+	b = j && b;
+      e = b * (h & d) || g;
+    }
+  b = i;
+  char n = e || h | d;
+  e = i < d & k / n;
+  return f;
+}
+
+int
+main ()
+{
+  if (foo ())
+    if (c)
+    lab:
+      goto lab;
+  return 0;
+}

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