From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 46508 invoked by alias); 21 Jan 2016 22:55:55 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 46496 invoked by uid 89); 21 Jan 2016 22:55:54 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD autolearn=no version=3.3.2 spammy=3167, 316,7, Expansion, H*F:D*samsung.com X-HELO: usmailout2.samsung.com Received: from mailout2.w2.samsung.com (HELO usmailout2.samsung.com) (211.189.100.12) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Thu, 21 Jan 2016 22:55:44 +0000 Received: from uscpsbgm2.samsung.com (u115.gpu85.samsung.co.kr [203.254.195.115]) by mailout2.w2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O1B00G2FROUEZ80@mailout2.w2.samsung.com> for gcc-patches@gcc.gnu.org; Thu, 21 Jan 2016 17:55:42 -0500 (EST) Received: from ussync2.samsung.com ( [203.254.195.82]) by uscpsbgm2.samsung.com (USCPMTA) with SMTP id 26.4C.07641.EE161A65; Thu, 21 Jan 2016 17:55:42 -0500 (EST) Received: from [172.31.207.192] ([105.140.31.209]) by ussync2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O1B000A0ROTIY50@ussync2.samsung.com>; Thu, 21 Jan 2016 17:55:42 -0500 (EST) Subject: Re: [PATCH 2/4 v2][AArch64] Add support for FCCMP To: James Greenhalgh References: <568C3D19.908@samsung.com> <568D7CBF.2070407@samsung.com> <20160121092402.GA8842@arm.com> <56A13867.3010103@samsung.com> <20160121220712.GA25892@arm.com> Cc: Wilco Dijkstra , "gcc-patches@gcc.gnu.org" , nd , Andrew Pinski From: Evandro Menezes Message-id: <56A161EC.6070407@samsung.com> Date: Thu, 21 Jan 2016 22:55:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-version: 1.0 In-reply-to: <20160121220712.GA25892@arm.com> Content-type: multipart/mixed; boundary=------------040402060304040203030203 X-IsSubscribed: yes X-SW-Source: 2016-01/txt/msg01686.txt.bz2 This is a multi-part message in MIME format. --------------040402060304040203030203 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-length: 4379 On 01/21/16 16:07, James Greenhalgh wrote: > On Thu, Jan 21, 2016 at 01:58:31PM -0600, Evandro Menezes wrote: >> Hi, James. >> >> On 01/21/16 03:24, James Greenhalgh wrote: >>> On Wed, Jan 06, 2016 at 02:44:47PM -0600, Evandro Menezes wrote: >>>> On 01/06/2016 06:04 AM, Wilco Dijkstra wrote: >>>>>> Here's what I had in mind when I inquired about distinguishing FCMP from >>>>>> FCCMP. As you can see in the patch, Exynos is the only target that >>>>>> cares about it, but I wonder if ThunderX or Xgene would too. >>>>>> >>>>>> What do you think? >>>>> The new attributes look fine (I've got a similar outstanding change), however >>>>> please don't add them to non-AArch64 cores. We only need it for thunderx.md, >>>>> cortex-a53.md, cortex-a57.md, xgene1.md and exynos-m1.md. >>>> Add support for the FCCMP insn types >>>> >>>> 2016-01-04 Evandro Menezes >>>> >>>> gcc/ >>>> * config/aarch64/aarch64.md (fccmp): Change insn type. >>>> (fccmpe): Likewise. >>>> * config/aarch64/thunderx.md (thunderx_fcmp): Add >>>> "fccmp{s,d}" types. >>>> * config/arm/cortex-a53.md (cortex_a53_fpalu): Likewise. >>>> * config/arm/cortex-a57.md (cortex_a57_fp_cmp): Likewise. >>>> * config/arm/xgene1.md (xgene1_fcmp): Likewise. >>>> * config/arm/exynos-m1.md (exynos_m1_fp_ccmp): New insn >>>> reservation. >>>> * config/arm/types.md (fccmps): Add new insn type. >>>> (fccmpd): Likewise. >>>> >>>> Got it. Here's an updated patch. Again, assuming that your >>>> original patch is in place. Perhaps you can build on it. >>> If we don't have any targets which care about the fccmps/fccmpd split in >>> the code base, do we really need it? Can we just follow the example of >>> fcsel? >> The Exynos M1 does care about the difference between FCMP and FCCMP, >> as can be seen in the patch. >> More explicitly: >> >> (define_insn_reservation "exynos_m1_fp_cmp" 4 >> (and (eq_attr "tune" "exynosm1") >> (eq_attr "type" "fcmps, fcmpd")) >> "em1_nmisc") >> >> (define_insn_reservation "exynos_m1_fp_ccmp" 7 >> (and (eq_attr "tune" "exynosm1") >> (eq_attr "type" "fccmps, fccmpd")) >> "em1_st, em1_nmisc") >> > I think I was unclear. Your exynos-m1 model cares about splitting fcmp[s/d] > and fccmp, but it doesn't care about splitting fccmp in to fccmps/fccmpd. It > is the split to fccmps/fccmpd that I think is unneccesary at this time. Indeed. However, it seems to me that the jury is still out about the {s,d} suffix, isn't it? Otherwise, whatever others deem better. I myself am agnostic about it. >>>> diff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md >>>> index 321ff89..daf7162 100644 >>>> --- a/gcc/config/arm/types.md >>>> +++ b/gcc/config/arm/types.md >>>> @@ -70,6 +70,7 @@ >>>> ; f_rint[d,s] double/single floating point rount to integral. >>>> ; f_store[d,s] double/single store to memory. Used for VFP unit. >>>> ; fadd[d,s] double/single floating-point scalar addition. >>>> +; fccmp[d,s] double/single floating-point conditional compare. >>> Can we follow the convention fcsel uses of calling out "From ARMv8-A:" >>> for this type? >> I'm not sure I follow. Though I didn't refer to the ISA spec, I >> used the description from it for the *fccmp* type. > Something like: > > ; fccmp From ARMv8-A: floating point conditional compare. > > Just to capture that this instruction is only available for cores implementing > ARMv8-A. Got it. Let me try this again: Add support for the FCCMP insn types 2016-01-21 Evandro Menezes gcc/ * config/aarch64/aarch64.md (fccmp): Change insn type. (fccmpe): Likewise. * config/aarch64/thunderx.md (thunderx_fcmp): Add "fccmp{s,d}" types. * config/arm/cortex-a53.md (cortex_a53_fpalu): Likewise. * config/arm/cortex-a57.md (cortex_a57_fp_cmp): Likewise. * config/arm/xgene1.md (xgene1_fcmp): Likewise. * config/arm/exynos-m1.md (exynos_m1_fp_ccmp): New insn reservation. * config/arm/types.md (fccmps): Add new insn type. (fccmpd): Likewise. Thank you, -- Evandro Menezes --------------040402060304040203030203 Content-Type: text/x-patch; name="0001-Add-support-for-the-FCCMP-insn-types.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="0001-Add-support-for-the-FCCMP-insn-types.patch" Content-length: 4921 >From 14874dec3257c7b59aed4b7c610305f76bbbcf33 Mon Sep 17 00:00:00 2001 From: Evandro Menezes Date: Mon, 4 Jan 2016 18:44:30 -0600 Subject: [PATCH] Add support for the FCCMP insn types 2016-01-21 Evandro Menezes gcc/ * config/aarch64/aarch64.md (fccmp): Change insn type. (fccmpe): Likewise. * config/aarch64/thunderx.md (thunderx_fcmp): Add "fccmp{s,d}" types. * config/arm/cortex-a53.md (cortex_a53_fpalu): Likewise. * config/arm/cortex-a57.md (cortex_a57_fp_cmp): Likewise. * config/arm/xgene1.md (xgene1_fcmp): Likewise. * config/arm/exynos-m1.md (exynos_m1_fp_ccmp): New insn reservation. * config/arm/types.md (fccmps): Add new insn type. (fccmpd): Likewise. --- gcc/config/aarch64/aarch64.md | 4 ++-- gcc/config/aarch64/thunderx.md | 2 +- gcc/config/arm/cortex-a53.md | 4 ++-- gcc/config/arm/cortex-a57.md | 2 +- gcc/config/arm/exynos-m1.md | 5 +++++ gcc/config/arm/types.md | 3 +++ gcc/config/arm/xgene1.md | 2 +- 7 files changed, 15 insertions(+), 7 deletions(-) diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 2f543aa..032b342 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -301,7 +301,7 @@ (match_operand 5 "immediate_operand")))] "TARGET_FLOAT" "fccmp\\t%2, %3, %k5, %m4" - [(set_attr "type" "fcmp")] + [(set_attr "type" "fccmp")] ) (define_insn "fccmpe" @@ -316,7 +316,7 @@ (match_operand 5 "immediate_operand")))] "TARGET_FLOAT" "fccmpe\\t%2, %3, %k5, %m4" - [(set_attr "type" "fcmp")] + [(set_attr "type" "fccmp")] ) ;; Expansion of signed mod by a power of 2 using CSNEG. diff --git a/gcc/config/aarch64/thunderx.md b/gcc/config/aarch64/thunderx.md index 922df39..058713a 100644 --- a/gcc/config/aarch64/thunderx.md +++ b/gcc/config/aarch64/thunderx.md @@ -156,7 +156,7 @@ (define_insn_reservation "thunderx_fcmp" 3 (and (eq_attr "tune" "thunderx") - (eq_attr "type" "fcmps,fcmpd")) + (eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd")) "thunderx_pipe1") (define_insn_reservation "thunderx_fmul" 6 diff --git a/gcc/config/arm/cortex-a53.md b/gcc/config/arm/cortex-a53.md index c1eeedb..fc60bc2 100644 --- a/gcc/config/arm/cortex-a53.md +++ b/gcc/config/arm/cortex-a53.md @@ -508,8 +508,8 @@ (define_insn_reservation "cortex_a53_fpalu" 5 (and (eq_attr "tune" "cortexa53") (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fmov, - f_cvt, fcmps, fcmpd, fcsel, f_rints, f_rintd, - f_minmaxs, f_minmaxd")) + f_cvt, fcmps, fcmpd, fccmps, fccmpd, fcsel, + f_rints, f_rintd, f_minmaxs, f_minmaxd")) "cortex_a53_slot_any,cortex_a53_fp_alu") (define_insn_reservation "cortex_a53_fconst" 3 diff --git a/gcc/config/arm/cortex-a57.md b/gcc/config/arm/cortex-a57.md index 0d28951..f4c112c 100644 --- a/gcc/config/arm/cortex-a57.md +++ b/gcc/config/arm/cortex-a57.md @@ -716,7 +716,7 @@ (define_insn_reservation "cortex_a57_fp_cmp" 7 (and (eq_attr "tune" "cortexa57") - (eq_attr "type" "fcmps,fcmpd")) + (eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd")) "ca57_cx2") (define_insn_reservation "cortex_a57_fp_arith" 4 diff --git a/gcc/config/arm/exynos-m1.md b/gcc/config/arm/exynos-m1.md index 0448073..973c8a9 100644 --- a/gcc/config/arm/exynos-m1.md +++ b/gcc/config/arm/exynos-m1.md @@ -823,6 +823,11 @@ (eq_attr "type" "fcmps, fcmpd")) "em1_nmisc") +(define_insn_reservation "exynos_m1_fp_ccmp" 7 + (and (eq_attr "tune" "exynosm1") + (eq_attr "type" "fccmps, fccmpd")) + "em1_st, em1_nmisc") + (define_insn_reservation "exynos_m1_fp_sel" 4 (and (eq_attr "tune" "exynosm1") (eq_attr "type" "fcsel")) diff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md index 321ff89..25f79b4 100644 --- a/gcc/config/arm/types.md +++ b/gcc/config/arm/types.md @@ -70,6 +70,7 @@ ; f_rint[d,s] double/single floating point rount to integral. ; f_store[d,s] double/single store to memory. Used for VFP unit. ; fadd[d,s] double/single floating-point scalar addition. +; fccmp[d,s] From ARMv8-A: floating-point conditional compare. ; fcmp[d,s] double/single floating-point compare. ; fconst[d,s] double/single load immediate. ; fcsel From ARMv8-A: Floating-point conditional select. @@ -582,6 +583,8 @@ f_stores,\ faddd,\ fadds,\ + fccmpd,\ + fccmps,\ fcmpd,\ fcmps,\ fconstd,\ diff --git a/gcc/config/arm/xgene1.md b/gcc/config/arm/xgene1.md index 8dfd8a1..b7aeac6 100644 --- a/gcc/config/arm/xgene1.md +++ b/gcc/config/arm/xgene1.md @@ -154,7 +154,7 @@ (define_insn_reservation "xgene1_fcmp" 10 (and (eq_attr "tune" "xgene1") - (eq_attr "type" "fcmpd,fcmps")) + (eq_attr "type" "fcmpd,fcmps,fccmpd,fccmps")) "xgene1_decode1op,xgene1_fsu+xgene1_fcmp*3") (define_insn_reservation "xgene1_fcsel" 3 -- 2.6.3 --------------040402060304040203030203--