Re: [PATCH][ARM,AARCH64] target/PR68674: relayout vector_types in expand_expr

[Christian Bruel <christian.bruel@st.com>]

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On 01/19/2016 04:18 PM, Richard Biener wrote:
> maybe just if (currently_expanding_to_rtl)?
>
> But yes, this looks like a safe variant of the fix.
>
> Richard.
>
thanks, currently_expanding_to_rtl works perfectly. So the final version.
I added a test for each target.

bootstrapped / tested for :
     unix/-m32/-march=i586
     unix

     arm-qemu/
     arm-qemu//-mfpu=neon
     arm-qemu//-mfpu=neon-fp-armv8

     aarch64-qemu








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2016-01-21  Christian Bruel  <christian.bruel@st.com>

	PR target/68674
	* expr.c (expand_expr_real_1): Reset DECL_MODE if VECTOR_TYPE_P changed.

2016-01-21  Christian Bruel  <christian.bruel@st.com>

	PR target/68674
	* gcc.target/i386/pr68674.c
	* gcc.target/aarch64/pr68674.c
	* gcc.target/arm/pr68674.c

Index: gcc/expr.c
===================================================================
--- gcc/expr.c	(revision 232724)
+++ gcc/expr.c	(working copy)
@@ -9597,7 +9597,16 @@ expand_expr_real_1 (tree exp, rtx target, machine_
       decl_rtl = DECL_RTL (exp);
     expand_decl_rtl:
       gcc_assert (decl_rtl);
-      decl_rtl = copy_rtx (decl_rtl);
+
+      /* DECL_MODE might change when TYPE_MODE depends on attribute target
+	 settings for VECTOR_TYPE_P that might switch for the function.  */
+      if (currently_expanding_to_rtl
+	  && code == VAR_DECL && MEM_P (decl_rtl)
+	  && VECTOR_TYPE_P (type) && exp && DECL_MODE (exp) != mode)
+	decl_rtl = change_address (decl_rtl, TYPE_MODE (type), 0);
+      else
+	decl_rtl = copy_rtx (decl_rtl);
+
       /* Record writes to register variables.  */
       if (modifier == EXPAND_WRITE
 	  && REG_P (decl_rtl)
Index: gcc/testsuite/gcc.target/aarch64/pr68674.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/pr68674.c	(revision 0)
+++ gcc/testsuite/gcc.target/aarch64/pr68674.c	(working copy)
@@ -0,0 +1,22 @@
+/* PR target/68674 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=generic+nosimd" } */
+
+#include <arm_neon.h>
+
+int8x8_t a;
+extern int8x8_t b;
+int16x8_t e;
+
+void __attribute__((target("+simd")))
+foo1(void)
+{
+  e = (int16x8_t) vaddl_s8(a, b);
+}
+
+int8x8_t __attribute__((target("+simd")))
+foo2(void)
+{
+  return a;
+}
+
Index: gcc/testsuite/gcc.target/arm/pr68674.c
===================================================================
--- gcc/testsuite/gcc.target/arm/pr68674.c	(revision 0)
+++ gcc/testsuite/gcc.target/arm/pr68674.c	(working copy)
@@ -0,0 +1,26 @@
+/* PR target/68674 */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O2 -mfloat-abi=softfp" } */
+
+#pragma GCC target ("fpu=vfp")
+
+#include <arm_neon.h>
+
+int8x8_t a;
+extern int8x8_t b;
+int16x8_t e;
+
+void __attribute__((target("fpu=neon")))
+foo1(void)
+{
+  e = (int16x8_t) vaddl_s8(a, b);
+}
+
+int8x8_t __attribute__((target("fpu=neon")))
+foo2(void)
+{
+  return b;
+}
+
+
Index: gcc/testsuite/gcc.target/i386/pr68674.c
===================================================================
--- gcc/testsuite/gcc.target/i386/pr68674.c	(revision 0)
+++ gcc/testsuite/gcc.target/i386/pr68674.c	(working copy)
@@ -0,0 +1,15 @@
+/* PR target/68674 */
+/* { dg-do compile } */
+/* { dg-require-effective-target avx } */
+/* { dg-options "-O2" } */
+
+typedef int v8si __attribute__((vector_size(32)));
+
+v8si a;
+
+ __attribute__((target("avx")))
+v8si
+foo()
+{
+    return a;
+}