From d447411ea85f065faa77d56cb143effffb07a467 Mon Sep 17 00:00:00 2001 From: Evandro Menezes Date: Mon, 19 Oct 2015 18:31:48 -0500 Subject: [PATCH] Replace insn to zero up SIMD registers gcc/ * config/aarch64/aarch64.md (*movhf_aarch64): Add "movi %0, #0" to zero up register. (*movsf_aarch64): Likewise and add "simd" and "fp" attributes. (*movdf_aarch64): Likewise. --- gcc/config/aarch64/aarch64.md | 33 ++++++++++++++++++++------------- 1 file changed, 20 insertions(+), 13 deletions(-) diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 68676c9..a5661ed 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1163,12 +1163,13 @@ ) (define_insn "*movhf_aarch64" - [(set (match_operand:HF 0 "nonimmediate_operand" "=w, ?r,w,w,m,r,m ,r") - (match_operand:HF 1 "general_operand" "?rY, w,w,m,w,m,rY,r"))] + [(set (match_operand:HF 0 "nonimmediate_operand" "=w,w,?r,w,w,m,r,m ,r") + (match_operand:HF 1 "general_operand" "?r,Y, w,w,m,w,m,rY,r"))] "TARGET_FLOAT && (register_operand (operands[0], HFmode) || aarch64_reg_or_fp_zero (operands[1], HFmode))" "@ mov\\t%0.h[0], %w1 + movi\\t%0.4h, #0 umov\\t%w0, %1.h[0] mov\\t%0.h[0], %1.h[0] ldr\\t%h0, %1 @@ -1176,19 +1177,20 @@ ldrh\\t%w0, %1 strh\\t%w1, %0 mov\\t%w0, %w1" - [(set_attr "type" "neon_from_gp,neon_to_gp,neon_move,\ + [(set_attr "type" "neon_from_gp,neon_move,neon_to_gp,neon_move,\ f_loads,f_stores,load1,store1,mov_reg") - (set_attr "simd" "yes,yes,yes,*,*,*,*,*") - (set_attr "fp" "*,*,*,yes,yes,*,*,*")] + (set_attr "simd" "yes,yes,yes,yes,*,*,*,*,*") + (set_attr "fp" "*,*,*,*,yes,yes,*,*,*")] ) (define_insn "*movsf_aarch64" - [(set (match_operand:SF 0 "nonimmediate_operand" "=w, ?r,w,w ,w,m,r,m ,r") - (match_operand:SF 1 "general_operand" "?rY, w,w,Ufc,m,w,m,rY,r"))] + [(set (match_operand:SF 0 "nonimmediate_operand" "=w,w,?r,w,w ,w,m,r,m ,r") + (match_operand:SF 1 "general_operand" "?r,Y, w,w,Ufc,m,w,m,rY,r"))] "TARGET_FLOAT && (register_operand (operands[0], SFmode) || aarch64_reg_or_fp_zero (operands[1], SFmode))" "@ fmov\\t%s0, %w1 + movi\\t%0.2s, #0 fmov\\t%w0, %s1 fmov\\t%s0, %s1 fmov\\t%s0, %1 @@ -1197,17 +1199,20 @@ ldr\\t%w0, %1 str\\t%w1, %0 mov\\t%w0, %w1" - [(set_attr "type" "f_mcr,f_mrc,fmov,fconsts,\ - f_loads,f_stores,load1,store1,mov_reg")] + [(set_attr "type" "f_mcr,neon_move,f_mrc,fmov,fconsts,\ + f_loads,f_stores,load1,store1,mov_reg") + (set_attr "simd" "yes,yes,yes,yes,yes,*,*,*,*,*") + (set_attr "fp" "yes,*,yes,yes,yes,yes,yes,*,*,yes")] ) (define_insn "*movdf_aarch64" - [(set (match_operand:DF 0 "nonimmediate_operand" "=w, ?r,w,w ,w,m,r,m ,r") - (match_operand:DF 1 "general_operand" "?rY, w,w,Ufc,m,w,m,rY,r"))] + [(set (match_operand:DF 0 "nonimmediate_operand" "=w,w,?r,w,w ,w,m,r,m ,r") + (match_operand:DF 1 "general_operand" "?r,Y, w,w,Ufc,m,w,m,rY,r"))] "TARGET_FLOAT && (register_operand (operands[0], DFmode) || aarch64_reg_or_fp_zero (operands[1], DFmode))" "@ fmov\\t%d0, %x1 + movi\\t%d0, #0 fmov\\t%x0, %d1 fmov\\t%d0, %d1 fmov\\t%d0, %1 @@ -1216,8 +1221,10 @@ ldr\\t%x0, %1 str\\t%x1, %0 mov\\t%x0, %x1" - [(set_attr "type" "f_mcr,f_mrc,fmov,fconstd,\ - f_loadd,f_stored,load1,store1,mov_reg")] + [(set_attr "type" "f_mcr,neon_move,f_mrc,fmov,fconstd,\ + f_loadd,f_stored,load1,store1,mov_reg") + (set_attr "simd" "yes,yes,yes,yes,yes,*,*,*,*,*") + (set_attr "fp" "yes,*,yes,yes,yes,yes,yes,*,*,yes")] ) (define_insn "*movtf_aarch64" -- 2.6.3