From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-patches-return-422386-listarch-gcc-patches=gcc.gnu.org@gcc.gnu.org>
Received: (qmail 21680 invoked by alias); 29 Feb 2016 12:18:21 -0000
Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm
Precedence: bulk
List-Id: <gcc-patches.gcc.gnu.org>
List-Archive: <http://gcc.gnu.org/ml/gcc-patches/>
List-Post: <mailto:gcc-patches@gcc.gnu.org>
List-Help: <mailto:gcc-patches-help@gcc.gnu.org>
Sender: gcc-patches-owner@gcc.gnu.org
Received: (qmail 21668 invoked by uid 89); 29 Feb 2016 12:18:20 -0000
Authentication-Results: sourceware.org; auth=none
X-Virus-Found: No
X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD autolearn=no version=3.3.2 spammy=SIGN_EXTEND, Hx-languages-length:1218, D*foss.arm.com, subregs
X-HELO: foss.arm.com
Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 29 Feb 2016 12:18:19 +0000
Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])	by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EE45749;	Mon, 29 Feb 2016 04:17:22 -0800 (PST)
Received: from [10.2.206.200] (e100706-lin.cambridge.arm.com [10.2.206.200])	by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 517253F25F;	Mon, 29 Feb 2016 04:18:16 -0800 (PST)
Message-ID: <56D43706.2060000@foss.arm.com>
Date: Mon, 29 Feb 2016 12:18:00 -0000
From: Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0
MIME-Version: 1.0
To: Ramana Radhakrishnan <ramana.gcc@googlemail.com>,  Christophe Lyon <christophe.lyon@linaro.org>
CC: GCC Patches <gcc-patches@gcc.gnu.org>,  Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>, Richard Earnshaw <Richard.Earnshaw@arm.com>,  Jim Wilson <jim.wilson@linaro.org>
Subject: Re: [PATCH][ARM][2/4] Fix operand costing logic for SMUL[TB][TB]
References: <56A1FBDF.6020402@foss.arm.com> <CAJA7tRZxUMrxzMwZnyD2zgt1Z1XZGL5t+7jbDuZnUALxaYJZvw@mail.gmail.com>
In-Reply-To: <CAJA7tRZxUMrxzMwZnyD2zgt1Z1XZGL5t+7jbDuZnUALxaYJZvw@mail.gmail.com>
Content-Type: text/plain; charset=utf-8; format=flowed
Content-Transfer-Encoding: 7bit
X-SW-Source: 2016-02/txt/msg01937.txt.bz2


On 04/02/16 09:00, Ramana Radhakrishnan wrote:
> On Fri, Jan 22, 2016 at 9:52 AM, Kyrill Tkachov
> <kyrylo.tkachov@foss.arm.com> wrote:
>> Hi all,
>>
>> As part of investigating the codegen effects of a fix for PR 65932 I found
>> we assign
>> too high a cost for the sign-extending multiply instruction SMULBB.
>> This is because we add the cost of a multiply-extend but then also recurse
>> into the
>> SIGN_EXTEND sub-expressions rather than the registers (or subregs) being
>> sign-extended.
>>
>> This patch is a simple fix. The fix is right by itself, but in combination
>> with patch 3
>> fix the gcc.target/arm/wmul-2.c testcase.
>>
>> Bootstrapped and tested on arm-none-linux-gnueabihf.
>>
>> Ok for trunk?
>>
> OK.

Is it ok to backport this to the GCC 5 branch?
It fixes a testcase with cortex-a5 tuning and was tested by Christophe:
https://gcc.gnu.org/ml/gcc-patches/2016-02/msg01238.html

Thanks,
Kyrill

> Thanks,
> Ramana
>> Thanks,
>> Kyrill
>>
>> 2016-01-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
>>
>>      * config/arm/arm.c (arm_new_rtx_costs, MULT case): Properly extract
>>      the operands of the SIGN_EXTENDs from a SMUL[TB][TB] rtx.