From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 2093 invoked by alias); 4 Mar 2016 17:24:51 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 2073 invoked by uid 89); 4 Mar 2016 17:24:50 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.9 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD autolearn=no version=3.3.2 spammy=!type, sk:GET_MOD, sk:get_mod, sk:TYPE_MA X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 04 Mar 2016 17:24:49 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6B53049; Fri, 4 Mar 2016 09:23:51 -0800 (PST) Received: from e105915-lin.cambridge.arm.com (e105915-lin.emea.arm.com [10.2.206.30]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 177433F213; Fri, 4 Mar 2016 09:24:46 -0800 (PST) Subject: Re: [PATCH 1/2][AArch64] Implement AAPCS64 updates for alignment attribute To: gcc-patches@gcc.gnu.org References: <56A113F7.1000503@foss.arm.com> <1453482960-2606-1-git-send-email-alan.lawrence@arm.com> <56CB241D.3010301@foss.arm.com> <20160226145159.GA40219@arm.com> Cc: James Greenhalgh , Marcus Shawcroft , Richard Earnshaw From: Alan Lawrence Message-ID: <56D9C4DD.9070807@foss.arm.com> Date: Fri, 04 Mar 2016 17:24:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <20160226145159.GA40219@arm.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2016-03/txt/msg00376.txt.bz2 On 26/02/16 14:52, James Greenhalgh wrote: >>> gcc/ChangeLog: >>> >>> * gcc/config/aarch64/aarch64.c (aarch64_function_arg_alignment): >>> Rewrite, looking one level down for records and arrays. >>> --- >>> gcc/config/aarch64/aarch64.c | 31 ++++++++++++++++--------------- >>> 1 file changed, 16 insertions(+), 15 deletions(-) >>> >>> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c >>> index 9142ac0..b084f83 100644 >>> --- a/gcc/config/aarch64/aarch64.c >>> +++ b/gcc/config/aarch64/aarch64.c >>> @@ -1925,22 +1925,23 @@ aarch64_vfp_is_call_candidate (cumulative_args_t pcum_v, machine_mode mode, >>> static unsigned int >>> aarch64_function_arg_alignment (machine_mode mode, const_tree type) >>> { >>> - unsigned int alignment; >>> + if (!type) >>> + return GET_MODE_ALIGNMENT (mode); >>> + if (integer_zerop (TYPE_SIZE (type))) >>> + return 0; >>> >>> - if (type) >>> - { >>> - if (!integer_zerop (TYPE_SIZE (type))) >>> - { >>> - if (TYPE_MODE (type) == mode) >>> - alignment = TYPE_ALIGN (type); >>> - else >>> - alignment = GET_MODE_ALIGNMENT (mode); >>> - } >>> - else >>> - alignment = 0; >>> - } >>> - else >>> - alignment = GET_MODE_ALIGNMENT (mode); >>> + gcc_assert (TYPE_MODE (type) == mode); >>> + >>> + if (!AGGREGATE_TYPE_P (type)) >>> + return TYPE_ALIGN (TYPE_MAIN_VARIANT (type)); >>> + >>> + if (TREE_CODE (type) == ARRAY_TYPE) >>> + return TYPE_ALIGN (TREE_TYPE (type)); >>> + >>> + unsigned int alignment = 0; >>> + >>> + for (tree field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field)) >>> + alignment = std::max (alignment, DECL_ALIGN (field)); >>> >>> return alignment; >>> } >>> >> >> >> Ping. >> >> If this is not appropriate for GCC6, then is it OK for Stage 1 of GCC 7? > > I think this needs to be a GCC 7 fix at this point. > > Additionally, I'd like to fully understand PR69841 before we take this > patch. > > In particular, under what circumstances can the C++ front end set DECL_ALIGN > of a type to be wider than we expect. Can we ever end up with 128-bit > alignment of a template parameter when we were expecting 32- or 64-bit > alignment, and if we can what are the implications on this patch? OK, so IIUC, we *should* be able to rely on DECL_ALIGN for the AAPCS64, as PR/69841 occurred on gcc-5-branch because a C++ frontend change had not been backported. I'm not proposing to backport these AArch64 changes, hence: Ping^2. (For gcc 7 ?) Also tests https://gcc.gnu.org/ml/gcc-patches/2016-01/msg01073.html . Thanks, Alan