From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 121723 invoked by alias); 8 Apr 2016 09:31:02 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 121704 invoked by uid 89); 8 Apr 2016 09:31:01 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 08 Apr 2016 09:30:51 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3AAC928; Fri, 8 Apr 2016 02:29:38 -0700 (PDT) Received: from [192.168.1.21] (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C84203F246; Fri, 8 Apr 2016 02:30:48 -0700 (PDT) Subject: Re: [PATCH][ARM] PR target/70566 Check that condition register is dead in tst-imm -> lsls-imm Thumb2 peepholes To: Kyrill Tkachov , GCC Patches References: <570673FB.7020803@foss.arm.com> Cc: Ramana Radhakrishnan From: "Richard Earnshaw (lists)" Message-ID: <57077A47.2070100@arm.com> Date: Fri, 08 Apr 2016 09:31:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <570673FB.7020803@foss.arm.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-SW-Source: 2016-04/txt/msg00384.txt.bz2 On 07/04/16 15:51, Kyrill Tkachov wrote: > Hi all, > > In this wrong-code PR we have a Thumb2 peephole transforming: > tst r3, #2 > bne .L3 > beq .L6 > > into: > lsls r3, r3, #30 // LSLS is shorter than TST in Thumb2 > bmi .L3 > beq .L6 > > that is, the branch following the extract+compare has its condition > properly changed but the > following branch doesn't get updated to check the opposite condition of > MI (PL). > Since the peepholes in thumb2.md only see the compare and a single > branch the solution, > suggested by Richard, is to guard those peepholes on the condition that > the condition register > is dead after the first branch. This patch does that and with it we no > longer perform the transformation > on the testcase. I've checked manually that we still perform the > peephole when the condition register > is indeed dead after the sequence. > > Bootstrapped and tested on on arm-none-linux-gnueabihf with > --with-mode=thumb as this affects only > Thumb2 codegen. > > Ok for trunk? > > This PR also affects GCC 5 and 4.9 so I'll be testing the patch there as > well. > > Thanks, > Kyrill > > > 2016-04-07 Kyrylo Tkachov > > PR target/70566 > * config/arm/thumb2.md (tst + branch-> lsls + branch > peephole below *orsi_not_shiftsi_si): Require that condition > register is dead after the peephole. > (second peephole after the above): Likewise. > > 2016-04-07 Kyrylo Tkachov > > PR target/70566 > * gcc.c-torture/execute/pr70566.c: New test. OK. R.