Re: [PATCH] [AArch64] support -mfentry feature for arm64

[Ramana Radhakrishnan <ramana.radhakrishnan@foss.arm.com>]

On 18/04/16 14:44, Alexander Monakov wrote:
> On Mon, 18 Apr 2016, Ramana Radhakrishnan wrote:
>> On Mon, Apr 18, 2016 at 2:26 PM, Alexander Monakov <amonakov@ispras.ru> wrote:
>>> On Thu, 14 Apr 2016, Szabolcs Nagy wrote:
>>>> looking at [2] i don't see why
>>>>
>>>> func:
>>>>   mov x9, x30
>>>>   bl _tracefunc
>>>>   <function body>
>>>>
>>>> is not good for the kernel.
>>>>
>>>> mov x9, x30 is a nop at function entry, so in
>>>> theory 4 byte atomic write should be enough
>>>> to enable/disable tracing.
>>>
>>> Overwriting x9 can be problematic because GCC has gained the ability to track
>>> register usage interprocedurally: if foo() calls bar(), and GCC has already
>>> emitted code for bar() and knows that it cannot change x9, it can use that
>>> knowledge to avoid saving/restoring x9 in foo() around calls to bar(). See
>>> option '-fipa-ra'.
>>>
>>> If there's no register that can be safely used in place of x9 here, then
>>> the backend should emit the entry/pad appropriately (e.g. with an unspec that
>>> clobbers the possibly-overwritten register).
>>
>> Can you not use one of x16 / x17 the intra-procedure-call scratch
>> registers as per the PCS ?
> 
> As long as:
> 
> - there's a guarantee that the call to _tracefunc wouldn't need some kind of
>   veneer that would clobber those; I don't know enough about AArch64 to say;
> 

A veneer could clobber them, yeah .

> - and GCC is not smart enough to be aware that intra-TU calls to 'func' (the
>   function we're instrumenting) don't touch x16/x17.  And GCC should be that
>   smart, if it's not, it's a bug, right? :)
> 

That it already is - IIRC. Otherwise -fipa-ra wouldn't work .

Alternatively just add x9 to the list for fipa-ra the same way as x16 / x17 are handled already , no ?

Ramana

> Thanks.
> Alexander
>