From: Evandro Menezes <e.menezes@samsung.com>
To: Wilco Dijkstra <Wilco.Dijkstra@arm.com>,
James Greenhalgh <James.Greenhalgh@arm.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
nd <nd@arm.com>, Marcus Shawcroft <Marcus.Shawcroft@arm.com>,
Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>,
Richard Earnshaw <Richard.Earnshaw@arm.com>
Subject: Re: [PATCH][AArch64] Replace insn to zero up SIMD registers
Date: Wed, 27 Apr 2016 19:55:00 -0000 [thread overview]
Message-ID: <57211918.3030703@samsung.com> (raw)
In-Reply-To: <AM3PR08MB008851F0C3936500019D609F83630@AM3PR08MB0088.eurprd08.prod.outlook.com>
On 04/26/16 08:25, Wilco Dijkstra wrote:
> Evandro Menezes wrote:
>> On 03/10/16 10:37, James Greenhalgh wrote:
>>> Thanks for sticking with it. This is OK for GCC 7 when development
>>> opens.
>>>
>>> Remember to mention the most recent changes in your Changelog entry
>>> (Remove "fp" attribute from *movhf_aarch64 and *movtf_aarch64).
>>
>> OK to commit?
> The updated Changelog looks fine - James already OK'd this.
Bootstrapped and checked on aarch64-unknown-linux-gnu and committed as
r235532.
Thank you,
--
Evandro Menezes
prev parent reply other threads:[~2016-04-27 19:55 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-22 13:52 [PATCH][AArch64] Replace insn to zero up DF register Wilco Dijkstra
2016-01-27 23:14 ` Evandro Menezes
2016-02-26 12:37 ` Wilco Dijkstra
2016-02-26 22:43 ` Evandro Menezes
2016-02-29 18:07 ` Wilco Dijkstra
2016-02-29 23:11 ` Evandro Menezes
2016-03-01 19:02 ` Wilco Dijkstra
2016-03-01 19:08 ` Evandro Menezes
2016-03-09 21:36 ` Evandro Menezes
2016-03-10 13:23 ` James Greenhalgh
2016-03-10 16:27 ` Evandro Menezes
2016-03-10 16:32 ` Evandro Menezes
2016-03-10 16:37 ` James Greenhalgh
2016-04-25 19:20 ` [PATCH][AArch64] Replace insn to zero up SIMD registers Evandro Menezes
2016-04-26 13:25 ` Wilco Dijkstra
2016-04-27 19:55 ` Evandro Menezes [this message]
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