From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 113447 invoked by alias); 4 May 2016 13:37:54 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 113428 invoked by uid 89); 4 May 2016 13:37:53 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.0 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Wed, 04 May 2016 13:37:49 +0000 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C2E8681123; Wed, 4 May 2016 13:37:47 +0000 (UTC) Received: from localhost.localdomain (vpn1-6-46.ams2.redhat.com [10.36.6.46]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u44DbjJ0027859; Wed, 4 May 2016 09:37:45 -0400 Subject: Re: Enabling -frename-registers? To: Ramana Radhakrishnan , Eric Botcazou References: <2317874.CXT2IFrHHt@polaris> <5729CAB8.8040805@redhat.com> <1996332.01ClvNjCVc@polaris> <5729F83A.1060008@arm.com> Cc: gcc-patches@gcc.gnu.org, David Edelsohn , Richard Biener , Jeffrey Law , Segher Boessenkool , nd From: Bernd Schmidt Message-ID: <5729FB28.2060900@redhat.com> Date: Wed, 04 May 2016 13:37:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <5729F83A.1060008@arm.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2016-05/txt/msg00299.txt.bz2 On 05/04/2016 03:25 PM, Ramana Radhakrishnan wrote: > On ARM / AArch32 I haven't seen any performance data yet - the one > place we are concerned about the impact is on Thumb2 code size as > regrename may end up inadvertently putting more things in high > registers. In theory at least arm_preferred_rename_class is designed to make the opposite happen. Bernd