From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 80536 invoked by alias); 16 May 2016 13:31:45 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 80526 invoked by uid 89); 16 May 2016 13:31:44 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=Hx-languages-length:5710 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 16 May 2016 13:31:34 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7603A3C; Mon, 16 May 2016 06:31:48 -0700 (PDT) Received: from [10.2.206.43] (e100706-lin.cambridge.arm.com [10.2.206.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AAA693F218; Mon, 16 May 2016 06:31:31 -0700 (PDT) Message-ID: <5739CBB2.9060102@foss.arm.com> Date: Mon, 16 May 2016 13:31:00 -0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: Christophe Lyon , gcc-patches@gcc.gnu.org Subject: Re: [Patch ARM/AArch64 05/11] Add missing vreinterpretq_p{8,16} tests. References: <1462973041-7911-1-git-send-email-christophe.lyon@linaro.org> <1462973041-7911-6-git-send-email-christophe.lyon@linaro.org> In-Reply-To: <1462973041-7911-6-git-send-email-christophe.lyon@linaro.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2016-05/txt/msg01113.txt.bz2 On 11/05/16 14:23, Christophe Lyon wrote: > 2016-05-02 Christophe Lyon > > * gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Add > missing tests for vreinterpretq_p{8,16}. Ok. Thanks, Kyrill > Change-Id: I7e9bb18c668c34685f12aa578868d7752232a96c > > diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c > index d4e5768..2570f73 100644 > --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c > +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c > @@ -371,6 +371,83 @@ VECT_VAR_DECL(expected_q_u64_8,uint,64,2) [] = { 0xf7f6f5f4f3f2f1f0, > VECT_VAR_DECL(expected_q_u64_9,uint,64,2) [] = { 0xfff3fff2fff1fff0, > 0xfff7fff6fff5fff4 }; > > + > +/* Expected results for vreinterpretq_p8_xx. */ > +VECT_VAR_DECL(expected_q_p8_1,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3, > + 0xf4, 0xf5, 0xf6, 0xf7, > + 0xf8, 0xf9, 0xfa, 0xfb, > + 0xfc, 0xfd, 0xfe, 0xff }; > +VECT_VAR_DECL(expected_q_p8_2,poly,8,16) [] = { 0xf0, 0xff, 0xf1, 0xff, > + 0xf2, 0xff, 0xf3, 0xff, > + 0xf4, 0xff, 0xf5, 0xff, > + 0xf6, 0xff, 0xf7, 0xff }; > +VECT_VAR_DECL(expected_q_p8_3,poly,8,16) [] = { 0xf0, 0xff, 0xff, 0xff, > + 0xf1, 0xff, 0xff, 0xff, > + 0xf2, 0xff, 0xff, 0xff, > + 0xf3, 0xff, 0xff, 0xff }; > +VECT_VAR_DECL(expected_q_p8_4,poly,8,16) [] = { 0xf0, 0xff, 0xff, 0xff, > + 0xff, 0xff, 0xff, 0xff, > + 0xf1, 0xff, 0xff, 0xff, > + 0xff, 0xff, 0xff, 0xff }; > +VECT_VAR_DECL(expected_q_p8_5,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3, > + 0xf4, 0xf5, 0xf6, 0xf7, > + 0xf8, 0xf9, 0xfa, 0xfb, > + 0xfc, 0xfd, 0xfe, 0xff }; > +VECT_VAR_DECL(expected_q_p8_6,poly,8,16) [] = { 0xf0, 0xff, 0xf1, 0xff, > + 0xf2, 0xff, 0xf3, 0xff, > + 0xf4, 0xff, 0xf5, 0xff, > + 0xf6, 0xff, 0xf7, 0xff }; > +VECT_VAR_DECL(expected_q_p8_7,poly,8,16) [] = { 0xf0, 0xff, 0xff, 0xff, > + 0xf1, 0xff, 0xff, 0xff, > + 0xf2, 0xff, 0xff, 0xff, > + 0xf3, 0xff, 0xff, 0xff }; > +VECT_VAR_DECL(expected_q_p8_8,poly,8,16) [] = { 0xf0, 0xff, 0xff, 0xff, > + 0xff, 0xff, 0xff, 0xff, > + 0xf1, 0xff, 0xff, 0xff, > + 0xff, 0xff, 0xff, 0xff }; > +VECT_VAR_DECL(expected_q_p8_9,poly,8,16) [] = { 0xf0, 0xff, 0xf1, 0xff, > + 0xf2, 0xff, 0xf3, 0xff, > + 0xf4, 0xff, 0xf5, 0xff, > + 0xf6, 0xff, 0xf7, 0xff }; > + > +/* Expected results for vreinterpretq_p16_xx. */ > +VECT_VAR_DECL(expected_q_p16_1,poly,16,8) [] = { 0xf1f0, 0xf3f2, > + 0xf5f4, 0xf7f6, > + 0xf9f8, 0xfbfa, > + 0xfdfc, 0xfffe }; > +VECT_VAR_DECL(expected_q_p16_2,poly,16,8) [] = { 0xfff0, 0xfff1, > + 0xfff2, 0xfff3, > + 0xfff4, 0xfff5, > + 0xfff6, 0xfff7 }; > +VECT_VAR_DECL(expected_q_p16_3,poly,16,8) [] = { 0xfff0, 0xffff, > + 0xfff1, 0xffff, > + 0xfff2, 0xffff, > + 0xfff3, 0xffff }; > +VECT_VAR_DECL(expected_q_p16_4,poly,16,8) [] = { 0xfff0, 0xffff, > + 0xffff, 0xffff, > + 0xfff1, 0xffff, > + 0xffff, 0xffff }; > +VECT_VAR_DECL(expected_q_p16_5,poly,16,8) [] = { 0xf1f0, 0xf3f2, > + 0xf5f4, 0xf7f6, > + 0xf9f8, 0xfbfa, > + 0xfdfc, 0xfffe }; > +VECT_VAR_DECL(expected_q_p16_6,poly,16,8) [] = { 0xfff0, 0xfff1, > + 0xfff2, 0xfff3, > + 0xfff4, 0xfff5, > + 0xfff6, 0xfff7 }; > +VECT_VAR_DECL(expected_q_p16_7,poly,16,8) [] = { 0xfff0, 0xffff, > + 0xfff1, 0xffff, > + 0xfff2, 0xffff, > + 0xfff3, 0xffff }; > +VECT_VAR_DECL(expected_q_p16_8,poly,16,8) [] = { 0xfff0, 0xffff, > + 0xffff, 0xffff, > + 0xfff1, 0xffff, > + 0xffff, 0xffff }; > +VECT_VAR_DECL(expected_q_p16_9,poly,16,8) [] = { 0xf1f0, 0xf3f2, > + 0xf5f4, 0xf7f6, > + 0xf9f8, 0xfbfa, > + 0xfdfc, 0xfffe }; > + > /* Expected results for vreinterpret_f32_xx. */ > VECT_VAR_DECL(expected_f32_1,hfloat,32,2) [] = { 0xf3f2f1f0, 0xf7f6f5f4 }; > VECT_VAR_DECL(expected_f32_2,hfloat,32,2) [] = { 0xfff1fff0, 0xfff3fff2 }; > @@ -685,6 +762,28 @@ void exec_vreinterpret (void) > TEST_VREINTERPRET(q, uint, u, 64, 2, poly, p, 8, 16, expected_q_u64_8); > TEST_VREINTERPRET(q, uint, u, 64, 2, poly, p, 16, 8, expected_q_u64_9); > > + /* vreinterpretq_p8_xx. */ > + TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, int, s, 8, 16, expected_q_p8_1); > + TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, int, s, 16, 8, expected_q_p8_2); > + TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, int, s, 32, 4, expected_q_p8_3); > + TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, int, s, 64, 2, expected_q_p8_4); > + TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, uint, u, 8, 16, expected_q_p8_5); > + TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, uint, u, 16, 8, expected_q_p8_6); > + TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, uint, u, 32, 4, expected_q_p8_7); > + TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, uint, u, 64, 2, expected_q_p8_8); > + TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, poly, p, 16, 8, expected_q_p8_9); > + > + /* vreinterpretq_p16_xx. */ > + TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, int, s, 8, 16, expected_q_p16_1); > + TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, int, s, 16, 8, expected_q_p16_2); > + TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, int, s, 32, 4, expected_q_p16_3); > + TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, int, s, 64, 2, expected_q_p16_4); > + TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, uint, u, 8, 16, expected_q_p16_5); > + TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, uint, u, 16, 8, expected_q_p16_6); > + TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, uint, u, 32, 4, expected_q_p16_7); > + TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, uint, u, 64, 2, expected_q_p16_8); > + TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, poly, p, 8, 16, expected_q_p16_9); > + > /* vreinterpret_f32_xx. */ > TEST_VREINTERPRET_FP(, float, f, 32, 2, int, s, 8, 8, expected_f32_1); > TEST_VREINTERPRET_FP(, float, f, 32, 2, int, s, 16, 4, expected_f32_2);