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From: Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>
To: Christophe Lyon <christophe.lyon@linaro.org>,  gcc-patches@gcc.gnu.org
Subject: Re: [Patch ARM/AArch64 07/11] Add missing vget_lane fp16 tests.
Date: Mon, 16 May 2016 13:41:00 -0000	[thread overview]
Message-ID: <5739CDEA.10904@foss.arm.com> (raw)
In-Reply-To: <1462973041-7911-8-git-send-email-christophe.lyon@linaro.org>


On 11/05/16 14:23, Christophe Lyon wrote:
> 2016-05-02  Christophe Lyon  <christophe.lyon@linaro.org>
>
> 	* gcc.target/aarch64/advsimd-intrinsics/vget_lane.c: Add fp16 tests.

I thought for a bit wrapping the expected_f16, expectedq_f16 and other declarations
in an "#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)"
as well but I don't think there's much to gain in that.

So ok for trunk.

Thanks,
Kyrill

> Change-Id: I5fafd1e90baf09588ab9f5444817c74e7d865a20
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_lane.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_lane.c
> index 5806050..fe41c5f 100644
> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_lane.c
> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_lane.c
> @@ -13,6 +13,7 @@ uint32_t   expected_u32  = 0xfffffff1;
>   uint64_t   expected_u64  = 0xfffffffffffffff0;
>   poly8_t    expected_p8   = 0xf6;
>   poly16_t   expected_p16  = 0xfff2;
> +hfloat16_t expected_f16  = 0xcb80;
>   hfloat32_t expected_f32  = 0xc1700000;
>   
>   int8_t     expectedq_s8  = 0xff;
> @@ -25,6 +26,7 @@ uint32_t   expectedq_u32 = 0xfffffff2;
>   uint64_t   expectedq_u64 = 0xfffffffffffffff1;
>   poly8_t    expectedq_p8  = 0xfe;
>   poly16_t   expectedq_p16 = 0xfff6;
> +hfloat16_t expectedq_f16 = 0xca80;
>   hfloat32_t expectedq_f32 = 0xc1500000;
>   
>   int error_found = 0;
> @@ -52,6 +54,10 @@ void exec_vget_lane (void)
>       uint32_t var_int32;
>       float32_t var_float32;
>     } var_int32_float32;
> +  union {
> +    uint16_t var_int16;
> +    float16_t var_float16;
> +  } var_int16_float16;
>   
>   #define TEST_VGET_LANE_FP(Q, T1, T2, W, N, L)				   \
>     VAR(var, T1, W) = vget##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N), L); \
> @@ -81,10 +87,17 @@ void exec_vget_lane (void)
>     VAR_DECL(var, uint, 64);
>     VAR_DECL(var, poly, 8);
>     VAR_DECL(var, poly, 16);
> +#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
> +  VAR_DECL(var, float, 16);
> +#endif
>     VAR_DECL(var, float, 32);
>   
>     /* Initialize input values.  */
>     TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
> +#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
> +  VLOAD(vector, buffer, , float, f, 16, 4);
> +  VLOAD(vector, buffer, q, float, f, 16, 8);
> +#endif
>     VLOAD(vector, buffer, , float, f, 32, 2);
>     VLOAD(vector, buffer, q, float, f, 32, 4);
>   
> @@ -99,6 +112,9 @@ void exec_vget_lane (void)
>     TEST_VGET_LANE(, uint, u, 64, 1, 0);
>     TEST_VGET_LANE(, poly, p, 8, 8, 6);
>     TEST_VGET_LANE(, poly, p, 16, 4, 2);
> +#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
> +  TEST_VGET_LANE_FP(, float, f, 16, 4, 1);
> +#endif
>     TEST_VGET_LANE_FP(, float, f, 32, 2, 1);
>   
>     TEST_VGET_LANE(q, int, s, 8, 16, 15);
> @@ -111,6 +127,9 @@ void exec_vget_lane (void)
>     TEST_VGET_LANE(q, uint, u, 64, 2, 1);
>     TEST_VGET_LANE(q, poly, p, 8, 16, 14);
>     TEST_VGET_LANE(q, poly, p, 16, 8, 6);
> +#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
> +  TEST_VGET_LANE_FP(q, float, f, 16, 8, 3);
> +#endif
>     TEST_VGET_LANE_FP(q, float, f, 32, 4, 3);
>   }
>   

  parent reply	other threads:[~2016-05-16 13:41 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-11 13:24 [Patch ARM/AArch64 00/11][testsuite] AdvSIMD intrinsics update Christophe Lyon
2016-05-11 13:24 ` [Patch ARM/AArch64 06/11] Add missing vtst_p8 and vtstq_p8 tests Christophe Lyon
2016-05-13 14:37   ` James Greenhalgh
2016-05-13 14:41     ` Christophe Lyon
2016-05-13 14:48       ` James Greenhalgh
2016-05-19 11:54         ` Christophe Lyon
2016-05-20 13:49           ` Kyrill Tkachov
2016-05-11 13:24 ` [Patch ARM/AArch64 08/11] Add missing vstX_lane fp16 tests Christophe Lyon
2016-05-13 14:53   ` James Greenhalgh
2016-05-19 16:20   ` Kyrill Tkachov
2016-05-11 13:24 ` [Patch ARM/AArch64 09/11] Add missing vrnd{,a,m,n,p,x} tests Christophe Lyon
2016-05-12  8:45   ` Jiong Wang
2016-05-12 12:56     ` Christophe Lyon
2016-05-13  8:39       ` Jiong Wang
2016-05-13 14:56   ` James Greenhalgh
2016-05-19 16:22   ` Kyrill Tkachov
2016-05-11 13:24 ` [Patch ARM/AArch64 02/11] We can remove useless #ifdefs from these tests: vmul, vshl and vtst Christophe Lyon
2016-05-13 13:56   ` James Greenhalgh
2016-05-16 13:25   ` Kyrill Tkachov
2016-05-11 13:24 ` [Patch ARM/AArch64 05/11] Add missing vreinterpretq_p{8,16} tests Christophe Lyon
2016-05-13 14:15   ` James Greenhalgh
2016-05-16 13:31   ` Kyrill Tkachov
2016-05-11 13:24 ` [Patch ARM/AArch64 03/11] AdvSIMD tests: be more verbose Christophe Lyon
2016-05-13 14:03   ` James Greenhalgh
2016-05-16 13:26   ` Kyrill Tkachov
2016-05-11 13:24 ` [Patch ARM/AArch64 01/11] Fix typo in vreinterpret.c test comment Christophe Lyon
2016-05-13 13:53   ` James Greenhalgh
2016-05-16 13:25   ` Kyrill Tkachov
2016-05-11 13:24 ` [Patch ARM/AArch64 11/11] Add missing tests for vreinterpret, operating of fp16 type Christophe Lyon
2016-05-13 15:17   ` James Greenhalgh
2016-05-19 16:24   ` Kyrill Tkachov
2016-05-11 13:24 ` [Patch ARM/AArch64 07/11] Add missing vget_lane fp16 tests Christophe Lyon
2016-05-13 14:38   ` James Greenhalgh
2016-05-16 13:41   ` Kyrill Tkachov [this message]
2016-05-11 13:24 ` [Patch ARM/AArch64 04/11] Add forgotten vsliq_n_u64 test Christophe Lyon
2016-05-13 14:09   ` James Greenhalgh
2016-05-13 14:22     ` Christophe Lyon
2016-05-16 13:27       ` Kyrill Tkachov
2016-05-11 13:24 ` [Patch ARM/AArch64 10/11] Add missing tests for intrinsics operating on poly64 and poly128 types Christophe Lyon
2016-05-13 15:16   ` James Greenhalgh
2016-05-19 16:23     ` Kyrill Tkachov
2016-05-23  9:12     ` Christophe Lyon
2016-05-13 15:32 ` [Patch ARM/AArch64 00/11][testsuite] AdvSIMD intrinsics update James Greenhalgh

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