From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 39124 invoked by alias); 19 May 2016 16:23:56 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 38028 invoked by uid 89); 19 May 2016 16:23:55 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=armneonrefh, dgaddoptions, UD:compute-ref-data.h, dg-add-options X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 19 May 2016 16:23:43 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2F2A92F; Thu, 19 May 2016 09:24:00 -0700 (PDT) Received: from [10.2.206.43] (e100706-lin.cambridge.arm.com [10.2.206.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B3D453F21A; Thu, 19 May 2016 09:23:40 -0700 (PDT) Message-ID: <573DE88B.8070505@foss.arm.com> Date: Thu, 19 May 2016 16:23:00 -0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: James Greenhalgh , Christophe Lyon CC: gcc-patches@gcc.gnu.org Subject: Re: [Patch ARM/AArch64 10/11] Add missing tests for intrinsics operating on poly64 and poly128 types. References: <1462973041-7911-1-git-send-email-christophe.lyon@linaro.org> <1462973041-7911-11-git-send-email-christophe.lyon@linaro.org> <20160513151607.GG12266@arm.com> In-Reply-To: <20160513151607.GG12266@arm.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2016-05/txt/msg01527.txt.bz2 On 13/05/16 16:16, James Greenhalgh wrote: > On Wed, May 11, 2016 at 03:24:00PM +0200, Christophe Lyon wrote: >> 2016-05-02 Christophe Lyon >> >> * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (result): >> Add poly64x1_t and poly64x2_t cases if supported. >> * gcc.target/aarch64/advsimd-intrinsics/compute-ref-data.h >> (buffer, buffer_pad, buffer_dup, buffer_dup_pad): Likewise. >> * gcc.target/aarch64/advsimd-intrinsics/p64_p128.c: New file. >> * gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: New file. >> * gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c: New file. >> >> --- /dev/null >> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/p64_p128.c >> @@ -0,0 +1,665 @@ >> +/* This file contains tests for all the *p64 intrinsics, except for >> + vreinterpret which have their own testcase. */ >> + >> +/* { dg-require-effective-target arm_crypto_ok } */ >> +/* { dg-add-options arm_crypto } */ >> + >> +#include >> +#include "arm-neon-ref.h" >> +#include "compute-ref-data.h" >> + >> +/* Expected results: vbsl. */ >> +VECT_VAR_DECL(vbsl_expected,poly,64,1) [] = { 0xfffffff1 }; >> +VECT_VAR_DECL(vbsl_expected,poly,64,2) [] = { 0xfffffff1, >> + 0xfffffff1 }; >> + >> +/* Expected results: vceq. */ >> +VECT_VAR_DECL(vceq_expected,uint,64,1) [] = { 0x0 }; > vceqq_p64 > vceqz_p64 > vceqzq_p64 > vtst_p64 > vtstq_p64 > > are missing, but will not be trivial to add. Could you raise a bug report > (or fix it if you like :-) )? > > This is OK without a fix for those intrinsics with a suitable bug report > opened. That's ok by me too. Thanks, Kyrill > Thanks, > James >